xref: /linux/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts (revision a6021aa24f6417416d93318bbfa022ab229c33c8) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre SAS. All rights reserved.
4 * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
5 */
6
7/dts-v1/;
8
9#include "meson-sm1-ac2xx.dtsi"
10#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
11
12/ {
13	compatible = "cyx,a95xf3-air-gbit", "amlogic,sm1";
14	model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
15
16	sound {
17		compatible = "amlogic,axg-sound-card";
18		model = "A95XF3-AIR";
19		audio-aux-devs = <&tdmout_b>;
20		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
21				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
22				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
23				"TDM_B Playback", "TDMOUT_B OUT";
24
25		clocks = <&clkc CLKID_MPLL2>,
26			 <&clkc CLKID_MPLL0>,
27			 <&clkc CLKID_MPLL1>;
28
29		assigned-clocks = <&clkc CLKID_MPLL2>,
30				  <&clkc CLKID_MPLL0>,
31				  <&clkc CLKID_MPLL1>;
32		assigned-clock-parents = <0>, <0>, <0>;
33		assigned-clock-rates = <294912000>,
34				       <270950400>,
35				       <393216000>;
36
37		dai-link-0 {
38			sound-dai = <&frddr_a>;
39		};
40
41		dai-link-1 {
42			sound-dai = <&frddr_b>;
43		};
44
45		dai-link-2 {
46			sound-dai = <&frddr_c>;
47		};
48
49		/* 8ch hdmi interface */
50		dai-link-3 {
51			sound-dai = <&tdmif_b>;
52			dai-format = "i2s";
53			dai-tdm-slot-tx-mask-0 = <1 1>;
54			dai-tdm-slot-tx-mask-1 = <1 1>;
55			dai-tdm-slot-tx-mask-2 = <1 1>;
56			dai-tdm-slot-tx-mask-3 = <1 1>;
57			mclk-fs = <256>;
58
59			codec {
60				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
61			};
62		};
63
64		/* hdmi glue */
65		dai-link-4 {
66			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
67
68			codec {
69				sound-dai = <&hdmi_tx>;
70			};
71		};
72	};
73};
74
75&arb {
76	status = "okay";
77};
78
79&clkc_audio {
80	status = "okay";
81};
82
83&ethmac {
84	status = "okay";
85
86	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
87	pinctrl-names = "default";
88	phy-mode = "rgmii-txid";
89	phy-handle = <&external_phy>;
90
91	rx-internal-delay-ps = <800>;
92};
93
94&ext_mdio {
95	external_phy: ethernet-phy@0 {
96		/* Realtek RTL8211F (0x001cc916) */
97		reg = <0>;
98		max-speed = <1000>;
99
100		reset-assert-us = <10000>;
101		reset-deassert-us = <80000>;
102		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
103
104		interrupt-parent = <&gpio_intc>;
105		/* MAC_INTR on GPIOZ_14 */
106		interrupts = <IRQID_GPIOZ_14 IRQ_TYPE_LEVEL_LOW>;
107	};
108};
109
110&frddr_a {
111	status = "okay";
112};
113
114&frddr_b {
115	status = "okay";
116};
117
118&frddr_c {
119	status = "okay";
120};
121
122&tdmif_b {
123	status = "okay";
124};
125
126&tdmout_b {
127	status = "okay";
128};
129
130&tohdmitx {
131	status = "okay";
132};
133