xref: /linux/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi (revision 4e94ddfe2aab72139acb8d5372fac9e6c3f3e383)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */
6
7#include <dt-bindings/clock/g12a-clkc.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/gpio/meson-g12a-gpio.h>
12#include <dt-bindings/sound/meson-g12a-toacodec.h>
13#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
14
15/ {
16	aliases {
17		serial0 = &uart_AO;
18		ethernet0 = &ethmac;
19		spi0 = &spifc;
20	};
21
22	memory@0 {
23		device_type = "memory";
24		reg = <0x0 0x0 0x0 0x80000000>;
25	};
26
27	chosen {
28		stdout-path = "serial0:115200n8";
29	};
30
31	dioo2133: audio-amplifier-0 {
32		compatible = "simple-audio-amplifier";
33		enable-gpios = <&gpio GPIOX_0 GPIO_ACTIVE_HIGH>;
34		VCC-supply = <&vcc_5v>;
35		sound-name-prefix = "10U2";
36	};
37
38	/* TOFIX: handle CVBS_DET on SARADC channel 0 */
39	cvbs-connector {
40		compatible = "composite-video-connector";
41
42		port {
43			cvbs_connector_in: endpoint {
44				remote-endpoint = <&cvbs_vdac_out>;
45			};
46		};
47	};
48
49	emmc_pwrseq: emmc-pwrseq {
50		compatible = "mmc-pwrseq-emmc";
51		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
52	};
53
54	hdmi-connector {
55		compatible = "hdmi-connector";
56		type = "a";
57
58		port {
59			hdmi_connector_in: endpoint {
60				remote-endpoint = <&hdmi_tx_tmds_out>;
61			};
62		};
63	};
64
65	led-blue {
66		compatible = "pwm-leds";
67
68		led {
69			color = <LED_COLOR_ID_BLUE>;
70			function = LED_FUNCTION_ACTIVITY;
71			linux,default-trigger = "heartbeat";
72			max-brightness = <255>;
73			pwms = <&pwm_ab 1 1250 0>;
74			active-low;
75		};
76	};
77
78	led-green {
79		compatible = "pwm-leds";
80
81		led {
82			color = <LED_COLOR_ID_GREEN>;
83			function = LED_FUNCTION_STATUS;
84			linux,default-trigger = "default-on";
85			max-brightness = <255>;
86			pwms = <&pwm_cd 1 1250 0>;
87			active-low;
88		};
89	};
90
91	led-orange {
92		compatible = "gpio-leds";
93
94		led {
95			color = <LED_COLOR_ID_AMBER>;
96			function = LED_FUNCTION_STANDBY;
97			gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
98			panic-indicator;
99		};
100	};
101
102	dc_in: regulator-dc-in {
103		compatible = "regulator-fixed";
104		regulator-name = "5V_IN";
105		regulator-min-microvolt = <5000000>;
106		regulator-max-microvolt = <5000000>;
107		regulator-always-on;
108	};
109
110	flash_1v8: regulator-flash-1v8 {
111		compatible = "regulator-fixed";
112		regulator-name = "FLASH_1V8";
113		regulator-min-microvolt = <1800000>;
114		regulator-max-microvolt = <1800000>;
115		regulator-always-on;
116		vin-supply = <&vcc_3v3>;
117	};
118
119	vcc_card: regulator-vcc-card {
120		compatible = "regulator-fixed";
121		regulator-name = "VCC_CARD";
122		regulator-min-microvolt = <3300000>;
123		regulator-max-microvolt = <3300000>;
124		vin-supply = <&vddao_3v3>;
125		gpio = <&gpio GPIOX_2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
126		enable-active-high;
127		gpio-open-drain;
128	};
129
130	vcc_3v3: regulator-vcc-3v3 {
131		compatible = "regulator-fixed";
132		regulator-name = "VCC_3V3";
133		regulator-min-microvolt = <3300000>;
134		regulator-max-microvolt = <3300000>;
135		regulator-always-on;
136		vin-supply = <&vddao_3v3>;
137
138		/* FIXME: controlled by TEST_N */
139	};
140
141	vcc_5v: regulator-vcc-5v {
142		compatible = "regulator-fixed";
143		regulator-name = "VCC_5V";
144		regulator-min-microvolt = <5000000>;
145		regulator-max-microvolt = <5000000>;
146		regulator-always-on;
147		vin-supply = <&dc_in>;
148		gpio = <&gpio GPIOH_8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
149		enable-active-high;
150		gpio-open-drain;
151	};
152
153	vddao_3v3: regulator-vddao_3v3 {
154		compatible = "regulator-fixed";
155		regulator-name = "VDDAO_3V3";
156		regulator-min-microvolt = <3300000>;
157		regulator-max-microvolt = <3300000>;
158		regulator-always-on;
159		vin-supply = <&dc_in>;
160	};
161
162	vddcpu_b: regulator-vddcpu-b {
163		compatible = "pwm-regulator";
164		regulator-name = "VDDCPU_B";
165		regulator-min-microvolt = <730000>;
166		regulator-max-microvolt = <1011000>;
167		regulator-boot-on;
168		regulator-always-on;
169		pwm-supply = <&dc_in>;
170		pwms = <&pwm_AO_cd 1 1250 0>;
171		pwm-dutycycle-range = <100 0>;
172	};
173
174	vddio_ao18: regulator-vddio_ao18 {
175		compatible = "regulator-fixed";
176		regulator-name = "VDDIO_AO18";
177		regulator-min-microvolt = <1800000>;
178		regulator-max-microvolt = <1800000>;
179		regulator-always-on;
180		vin-supply = <&vddao_3v3>;
181	};
182
183	vddio_c: regulator-vddio_c {
184		compatible = "regulator-gpio";
185		regulator-name = "VDDIO_C";
186		regulator-min-microvolt = <1800000>;
187		regulator-max-microvolt = <3300000>;
188		regulator-settling-time-up-us = <200>;
189		regulator-settling-time-down-us = <50000>;
190		vin-supply = <&vddao_3v3>;
191		gpios = <&gpio GPIOX_4 GPIO_ACTIVE_HIGH>;
192		states = <3300000 0>,
193			 <1800000 1>;
194	};
195
196	sound {
197		compatible = "amlogic,axg-sound-card";
198		audio-widgets = "Line", "Lineout";
199		audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
200				 <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
201				 <&dioo2133>;
202
203		assigned-clocks = <&clkc CLKID_MPLL2>,
204				  <&clkc CLKID_MPLL0>,
205				  <&clkc CLKID_MPLL1>;
206		assigned-clock-parents = <0>, <0>, <0>;
207		assigned-clock-rates = <294912000>,
208				       <270950400>,
209				       <393216000>;
210
211		dai-link-0 {
212			sound-dai = <&frddr_a>;
213		};
214
215		dai-link-1 {
216			sound-dai = <&frddr_b>;
217		};
218
219		dai-link-2 {
220			sound-dai = <&frddr_c>;
221		};
222
223		dai-link-3 {
224			sound-dai = <&toddr_a>;
225		};
226
227		dai-link-4 {
228			sound-dai = <&toddr_b>;
229		};
230
231		dai-link-5 {
232			sound-dai = <&toddr_c>;
233		};
234
235		/*
236		 * Audio setup: The 40 pins header provides access to 2 TDMs,
237		 * SPDIF In/Out and PDM inputs.
238		 * - TDM A: 2 lanes
239		 *    D0:    40/X9
240		 *    D1:    38/X8
241		 *    BCLK:  12/X11
242		 *    FS:    35/X10
243		 * - TDM B: 4 lanes
244		 *    D0:    37/A3
245		 *    D1:    16/A4
246		 *    D2:    18/A5 or 7/AO6
247		 *    D3:    22/A6 or 21/H5
248		 *    BCLK:  29/A1 or 8/AO8
249		 *    FS:    31/A2 or 11/AO7
250		 * - 2 Master Clocks:
251		 *    MCLK0: 15/A0 or 10/AO9
252		 *    MCLK1: 33/X15
253		 * - SPDIF:
254		 *    OUT:   32/A11
255		 *    IN:    21/H5
256		 * - PDM Input:
257		 *    DO:    13/A8
258		 *    D1:    26/A9
259		 *    D2:    22/A6
260		 *    D3:    18/A5
261		 *    DCLK:  36/A7
262		 *
263		 * TDM C is not usable on the 40 pins connector so it is
264		 * setup for the HDMI 4 lanes i2s.
265		 *
266		 * No pinctrl is enabled by default to preserve the
267		 * genericity of the 40 pins header. Many configurations are
268		 * possible based on the desired use case. Please adjust TDM
269		 * masks, clock setups and pinctrl accordingly.
270		 */
271
272		dai-link-6 {
273			sound-dai = <&tdmif_a>;
274			dai-format = "dsp_a";
275			dai-tdm-slot-tx-mask-0 = <1 1>;
276			mclk-fs = <256>;
277
278			codec-0 {
279				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
280			};
281
282			codec-1 {
283				sound-dai = <&toacodec TOACODEC_IN_A>;
284			};
285		};
286
287		dai-link-7 {
288			sound-dai = <&tdmif_b>;
289			dai-format = "i2s";
290			dai-tdm-slot-tx-mask-0 = <1 1>;
291			dai-tdm-slot-rx-mask-1 = <1 1>;
292			mclk-fs = <256>;
293
294			codec-0 {
295				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
296			};
297
298			codec-1 {
299				sound-dai = <&toacodec TOACODEC_IN_B>;
300			};
301		};
302
303		dai-link-8 {
304			sound-dai = <&tdmif_c>;
305			dai-format = "i2s";
306			dai-tdm-slot-tx-mask-0 = <1 1>;
307			dai-tdm-slot-tx-mask-1 = <1 1>;
308			dai-tdm-slot-tx-mask-2 = <1 1>;
309			dai-tdm-slot-tx-mask-3 = <1 1>;
310			mclk-fs = <256>;
311
312			codec-0 {
313				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
314			};
315
316			codec-1 {
317				sound-dai = <&toacodec TOACODEC_IN_C>;
318			};
319		};
320
321		dai-link-9 {
322			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
323
324			codec {
325				sound-dai = <&hdmi_tx>;
326			};
327		};
328
329		dai-link-10 {
330			sound-dai = <&toacodec TOACODEC_OUT>;
331
332			codec {
333				sound-dai = <&acodec>;
334			};
335		};
336	};
337};
338
339&acodec {
340	status = "okay";
341	AVDD-supply = <&vddio_ao18>;
342};
343
344&arb {
345	status = "okay";
346};
347
348&cecb_AO {
349	status = "okay";
350	pinctrl-0 = <&cec_ao_b_h_pins>;
351	pinctrl-names = "default";
352	hdmi-phandle = <&hdmi_tx>;
353};
354
355&clkc_audio {
356	status = "okay";
357};
358
359&cvbs_vdac_port {
360	cvbs_vdac_out: endpoint {
361		remote-endpoint = <&cvbs_connector_in>;
362	};
363};
364
365&dwc3 {
366	#address-cells = <1>;
367	#size-cells = <0>;
368
369	hub: hub@1 {
370		compatible = "usb5e3,626";
371		reg = <1>;
372		reset-gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
373		vdd-supply = <&vcc_5v>;
374	};
375};
376
377&ethmac {
378	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>, <&eth_phy_irq_pins>;
379	pinctrl-names = "default";
380	status = "okay";
381	phy-mode = "rgmii";
382	phy-handle = <&external_phy>;
383	amlogic,tx-delay-ns = <2>;
384};
385
386&ext_mdio {
387	external_phy: ethernet-phy@0 {
388		/* Realtek RTL8211F (0x001cc916) */
389		reg = <0>;
390		max-speed = <1000>;
391
392		reset-assert-us = <100000>;
393		reset-deassert-us = <100000>;
394		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
395
396		interrupt-parent = <&gpio_intc>;
397		/* MAC_INTR on GPIOZ_14 */
398		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
399	};
400};
401
402&frddr_a {
403	status = "okay";
404};
405
406&frddr_b {
407	status = "okay";
408};
409
410&frddr_c {
411	status = "okay";
412};
413
414&hdmi_tx {
415	status = "okay";
416	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
417	pinctrl-names = "default";
418	hdmi-supply = <&vcc_5v>;
419};
420
421&hdmi_tx_tmds_port {
422	hdmi_tx_tmds_out: endpoint {
423		remote-endpoint = <&hdmi_connector_in>;
424	};
425};
426
427&ir {
428	status = "okay";
429	pinctrl-0 = <&remote_input_ao_pins>;
430	pinctrl-names = "default";
431};
432
433&periphs_pinctrl {
434	spi_cs_disable_pins: spi-cs-disable {
435		mux {
436			groups = "BOOT_14";
437			function = "gpio_periphs";
438			bias-disable;
439			output-high;
440		};
441	};
442
443	eth_phy_irq_pins: eth-phy-irq {
444		mux {
445			groups = "GPIOZ_14";
446			function = "gpio_periphs";
447			bias-pull-up;
448			output-disable;
449		};
450	};
451};
452
453&pwm_AO_cd {
454	status = "okay";
455	pinctrl-0 = <&pwm_ao_d_e_pins>;
456	pinctrl-names = "default";
457	clocks = <&xtal>;
458	clock-names = "clkin1";
459};
460
461&pwm_ab {
462	status = "okay";
463	pinctrl-0 = <&pwm_b_x7_pins>;
464	pinctrl-names = "default";
465	clocks = <&xtal>;
466	clock-names = "clkin1";
467};
468
469&pwm_cd {
470	status = "okay";
471	pinctrl-0 = <&pwm_d_x3_pins>;
472	pinctrl-names = "default";
473	clocks = <&xtal>;
474	clock-names = "clkin1";
475};
476
477&saradc {
478	status = "okay";
479	vref-supply = <&vddio_ao18>;
480};
481
482/* SD card */
483&sd_emmc_b {
484	status = "okay";
485	pinctrl-0 = <&sdcard_c_pins>;
486	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
487	pinctrl-names = "default", "clk-gate";
488
489	bus-width = <4>;
490	cap-sd-highspeed;
491	sd-uhs-sdr12;
492	sd-uhs-sdr25;
493	sd-uhs-sdr50;
494	sd-uhs-sdr104;
495	max-frequency = <200000000>;
496	disable-wp;
497
498	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
499	vmmc-supply = <&vcc_card>;
500	vqmmc-supply = <&vddio_c>;
501};
502
503/*
504 * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR CS
505 * and eMMC Data 4 to 7 pins.
506 * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
507 * and change bus-width to 4 then spifc can be enabled.
508 */
509&sd_emmc_c {
510	status = "okay";
511	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>,
512		    <&spi_cs_disable_pins>;
513	pinctrl-1 = <&emmc_clk_gate_pins>;
514	pinctrl-names = "default", "clk-gate";
515
516	bus-width = <8>;
517	cap-mmc-highspeed;
518	mmc-hs200-1_8v;
519	max-frequency = <200000000>;
520	disable-wp;
521
522	mmc-pwrseq = <&emmc_pwrseq>;
523	vmmc-supply = <&vcc_3v3>;
524	vqmmc-supply = <&flash_1v8>;
525};
526
527&spifc {
528	status = "disabled";
529	pinctrl-0 = <&nor_pins>;
530	pinctrl-names = "default";
531	cs-gpios = <&gpio BOOT_14 GPIO_ACTIVE_LOW>;
532
533	w25lq128d: flash@0 {
534		compatible = "jedec,spi-nor";
535		reg = <0>;
536		#address-cells = <1>;
537		#size-cells = <1>;
538		spi-max-frequency = <80000000>;
539	};
540};
541
542&tdmif_a {
543	status = "okay";
544};
545
546&tdmif_b {
547	status = "okay";
548};
549
550&tdmif_c {
551	status = "okay";
552};
553
554&tdmin_a {
555	status = "okay";
556};
557
558&tdmin_b {
559	status = "okay";
560};
561
562&tdmin_c {
563	status = "okay";
564};
565
566&tdmout_a {
567	status = "okay";
568};
569
570&tdmout_b {
571	status = "okay";
572};
573
574&tdmout_c {
575	status = "okay";
576};
577
578&toacodec {
579	status = "okay";
580};
581
582&toddr_a {
583	status = "okay";
584};
585
586&toddr_b {
587	status = "okay";
588};
589
590&toddr_c {
591	status = "okay";
592};
593
594&tohdmitx {
595	status = "okay";
596};
597
598&uart_AO {
599	status = "okay";
600	pinctrl-0 = <&uart_ao_a_pins>;
601	pinctrl-names = "default";
602};
603
604&usb2_phy1 {
605	phy-supply = <&dc_in>;
606};
607
608&usb3_pcie_phy {
609	phy-supply = <&vcc_5v>;
610};
611
612&usb {
613	status = "okay";
614};
615