xref: /linux/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi (revision b615879dbfea6cf1236acbc3f2fb25ae84e07071)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Endless Computers, Inc.
4 * Author: Carlo Caione <carlo@endlessm.com>
5 */
6
7#include "meson-gxl.dtsi"
8
9/ {
10	compatible = "amlogic,meson-gxm";
11
12	cpus {
13		cpu-map {
14			cluster0 {
15				core0 {
16					cpu = <&cpu0>;
17				};
18				core1 {
19					cpu = <&cpu1>;
20				};
21				core2 {
22					cpu = <&cpu2>;
23				};
24				core3 {
25					cpu = <&cpu3>;
26				};
27			};
28
29			cluster1 {
30				core0 {
31					cpu = <&cpu4>;
32				};
33				core1 {
34					cpu = <&cpu5>;
35				};
36				core2 {
37					cpu = <&cpu6>;
38				};
39				core3 {
40					cpu = <&cpu7>;
41				};
42			};
43		};
44
45		cpu0: cpu@0 {
46			capacity-dmips-mhz = <1024>;
47		};
48
49		cpu1: cpu@1 {
50			capacity-dmips-mhz = <1024>;
51		};
52
53		cpu2: cpu@2 {
54			capacity-dmips-mhz = <1024>;
55		};
56
57		cpu3: cpu@3 {
58			capacity-dmips-mhz = <1024>;
59		};
60
61		cpu4: cpu@100 {
62			device_type = "cpu";
63			compatible = "arm,cortex-a53";
64			reg = <0x0 0x100>;
65			enable-method = "psci";
66			capacity-dmips-mhz = <1024>;
67			d-cache-line-size = <32>;
68			d-cache-size = <0x8000>;
69			d-cache-sets = <32>;
70			i-cache-line-size = <32>;
71			i-cache-size = <0x8000>;
72			i-cache-sets = <32>;
73			next-level-cache = <&l2>;
74			clocks = <&scpi_dvfs 1>;
75			#cooling-cells = <2>;
76		};
77
78		cpu5: cpu@101 {
79			device_type = "cpu";
80			compatible = "arm,cortex-a53";
81			reg = <0x0 0x101>;
82			enable-method = "psci";
83			capacity-dmips-mhz = <1024>;
84			d-cache-line-size = <32>;
85			d-cache-size = <0x8000>;
86			d-cache-sets = <32>;
87			i-cache-line-size = <32>;
88			i-cache-size = <0x8000>;
89			i-cache-sets = <32>;
90			next-level-cache = <&l2>;
91			clocks = <&scpi_dvfs 1>;
92			#cooling-cells = <2>;
93		};
94
95		cpu6: cpu@102 {
96			device_type = "cpu";
97			compatible = "arm,cortex-a53";
98			reg = <0x0 0x102>;
99			enable-method = "psci";
100			capacity-dmips-mhz = <1024>;
101			d-cache-line-size = <32>;
102			d-cache-size = <0x8000>;
103			d-cache-sets = <32>;
104			i-cache-line-size = <32>;
105			i-cache-size = <0x8000>;
106			i-cache-sets = <32>;
107			next-level-cache = <&l2>;
108			clocks = <&scpi_dvfs 1>;
109			#cooling-cells = <2>;
110		};
111
112		cpu7: cpu@103 {
113			device_type = "cpu";
114			compatible = "arm,cortex-a53";
115			reg = <0x0 0x103>;
116			enable-method = "psci";
117			capacity-dmips-mhz = <1024>;
118			d-cache-line-size = <32>;
119			d-cache-size = <0x8000>;
120			d-cache-sets = <32>;
121			i-cache-line-size = <32>;
122			i-cache-size = <0x8000>;
123			i-cache-sets = <32>;
124			next-level-cache = <&l2>;
125			clocks = <&scpi_dvfs 1>;
126			#cooling-cells = <2>;
127		};
128	};
129
130	gpu_opp_table: opp-table {
131		compatible = "operating-points-v2";
132
133		opp-125000000 {
134			opp-hz = /bits/ 64 <125000000>;
135			opp-microvolt = <950000>;
136		};
137		opp-250000000 {
138			opp-hz = /bits/ 64 <250000000>;
139			opp-microvolt = <950000>;
140		};
141		opp-285714285 {
142			opp-hz = /bits/ 64 <285714285>;
143			opp-microvolt = <950000>;
144		};
145		opp-400000000 {
146			opp-hz = /bits/ 64 <400000000>;
147			opp-microvolt = <950000>;
148		};
149		opp-500000000 {
150			opp-hz = /bits/ 64 <500000000>;
151			opp-microvolt = <950000>;
152		};
153		opp-666666666 {
154			opp-hz = /bits/ 64 <666666666>;
155			opp-microvolt = <950000>;
156		};
157	};
158};
159
160&apb {
161	usb2_phy2: phy@78040 {
162		compatible = "amlogic,meson-gxl-usb2-phy";
163		#phy-cells = <0>;
164		reg = <0x0 0x78040 0x0 0x20>;
165		clocks = <&clkc CLKID_USB>;
166		clock-names = "phy";
167		resets = <&reset RESET_USB_OTG>;
168		reset-names = "phy";
169		status = "okay";
170	};
171
172	mali: gpu@c0000 {
173		compatible = "amlogic,meson-gxm-mali", "arm,mali-t820";
174		reg = <0x0 0xc0000 0x0 0x40000>;
175		interrupt-parent = <&gic>;
176		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
177			     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
178			     <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
179		interrupt-names = "job", "mmu", "gpu";
180		clocks = <&clkc CLKID_MALI>;
181		resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
182		operating-points-v2 = <&gpu_opp_table>;
183	};
184};
185
186&clkc_AO {
187	compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc";
188};
189
190&cpu_cooling_maps {
191	map0 {
192		cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
193				 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
194				 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
195				 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
196				 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
197				 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
198				 <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
199				 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
200	};
201
202	map1 {
203		cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
204				 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
205				 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
206				 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
207				 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
208				 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
209				 <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
210				 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
211	};
212};
213
214&saradc {
215	compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
216};
217
218&scpi_dvfs {
219	clock-indices = <0 1>;
220	clock-output-names = "vbig", "vlittle";
221};
222
223&vpu {
224	compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
225};
226
227&hdmi_tx {
228	compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
229};
230
231&usb {
232	compatible = "amlogic,meson-gxm-usb-ctrl";
233
234	phy-names = "usb2-phy0", "usb2-phy1", "usb2-phy2";
235	phys = <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>;
236};
237
238&vdec {
239	compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec";
240};
241