xref: /linux/arch/arm64/boot/dts/amlogic/meson-gx.dtsi (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Andreas Färber
4 *
5 * Copyright (c) 2016 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 *
8 * Copyright (c) 2016 Endless Computers, Inc.
9 * Author: Carlo Caione <carlo@endlessm.com>
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/power/meson-gxbb-power.h>
16#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
17#include <dt-bindings/thermal/thermal.h>
18
19/ {
20	interrupt-parent = <&gic>;
21	#address-cells = <2>;
22	#size-cells = <2>;
23
24	reserved-memory {
25		#address-cells = <2>;
26		#size-cells = <2>;
27		ranges;
28
29		/* 16 MiB reserved for Hardware ROM Firmware */
30		hwrom_reserved: hwrom@0 {
31			reg = <0x0 0x0 0x0 0x1000000>;
32			no-map;
33		};
34
35		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
36		secmon_reserved: secmon@10000000 {
37			reg = <0x0 0x10000000 0x0 0x200000>;
38			no-map;
39		};
40
41		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
42		secmon_reserved_alt: secmon@5000000 {
43			reg = <0x0 0x05000000 0x0 0x300000>;
44			no-map;
45		};
46
47		linux,cma {
48			compatible = "shared-dma-pool";
49			reusable;
50			size = <0x0 0x10000000>;
51			alignment = <0x0 0x400000>;
52			linux,cma-default;
53		};
54	};
55
56	chosen {
57		#address-cells = <2>;
58		#size-cells = <2>;
59		ranges;
60
61		simplefb_cvbs: framebuffer-cvbs {
62			compatible = "amlogic,simple-framebuffer",
63				     "simple-framebuffer";
64			amlogic,pipeline = "vpu-cvbs";
65			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
66			status = "disabled";
67		};
68
69		simplefb_hdmi: framebuffer-hdmi {
70			compatible = "amlogic,simple-framebuffer",
71				     "simple-framebuffer";
72			amlogic,pipeline = "vpu-hdmi";
73			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
74			status = "disabled";
75		};
76	};
77
78	cpus {
79		#address-cells = <0x2>;
80		#size-cells = <0x0>;
81
82		cpu0: cpu@0 {
83			device_type = "cpu";
84			compatible = "arm,cortex-a53";
85			reg = <0x0 0x0>;
86			enable-method = "psci";
87			next-level-cache = <&l2>;
88			clocks = <&scpi_dvfs 0>;
89			#cooling-cells = <2>;
90		};
91
92		cpu1: cpu@1 {
93			device_type = "cpu";
94			compatible = "arm,cortex-a53";
95			reg = <0x0 0x1>;
96			enable-method = "psci";
97			next-level-cache = <&l2>;
98			clocks = <&scpi_dvfs 0>;
99			#cooling-cells = <2>;
100		};
101
102		cpu2: cpu@2 {
103			device_type = "cpu";
104			compatible = "arm,cortex-a53";
105			reg = <0x0 0x2>;
106			enable-method = "psci";
107			next-level-cache = <&l2>;
108			clocks = <&scpi_dvfs 0>;
109			#cooling-cells = <2>;
110		};
111
112		cpu3: cpu@3 {
113			device_type = "cpu";
114			compatible = "arm,cortex-a53";
115			reg = <0x0 0x3>;
116			enable-method = "psci";
117			next-level-cache = <&l2>;
118			clocks = <&scpi_dvfs 0>;
119			#cooling-cells = <2>;
120		};
121
122		l2: l2-cache0 {
123			compatible = "cache";
124		};
125	};
126
127	thermal-zones {
128		cpu-thermal {
129			polling-delay-passive = <250>; /* milliseconds */
130			polling-delay = <1000>; /* milliseconds */
131
132			thermal-sensors = <&scpi_sensors 0>;
133
134			trips {
135				cpu_passive: cpu-passive {
136					temperature = <80000>; /* millicelsius */
137					hysteresis = <2000>; /* millicelsius */
138					type = "passive";
139				};
140
141				cpu_hot: cpu-hot {
142					temperature = <90000>; /* millicelsius */
143					hysteresis = <2000>; /* millicelsius */
144					type = "hot";
145				};
146
147				cpu_critical: cpu-critical {
148					temperature = <110000>; /* millicelsius */
149					hysteresis = <2000>; /* millicelsius */
150					type = "critical";
151				};
152			};
153
154			cpu_cooling_maps: cooling-maps {
155				map0 {
156					trip = <&cpu_passive>;
157					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
158							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
159							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
160							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
161				};
162
163				map1 {
164					trip = <&cpu_hot>;
165					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
166							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
167							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
168							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
169				};
170			};
171		};
172	};
173
174	arm-pmu {
175		compatible = "arm,cortex-a53-pmu";
176		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
177			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
178			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
179			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
180		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
181	};
182
183	psci {
184		compatible = "arm,psci-0.2";
185		method = "smc";
186	};
187
188	timer {
189		compatible = "arm,armv8-timer";
190		interrupts = <GIC_PPI 13
191			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
192			     <GIC_PPI 14
193			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
194			     <GIC_PPI 11
195			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
196			     <GIC_PPI 10
197			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
198	};
199
200	xtal: xtal-clk {
201		compatible = "fixed-clock";
202		clock-frequency = <24000000>;
203		clock-output-names = "xtal";
204		#clock-cells = <0>;
205	};
206
207	firmware {
208		sm: secure-monitor {
209			compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
210		};
211	};
212
213	efuse: efuse {
214		compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
215		#address-cells = <1>;
216		#size-cells = <1>;
217		read-only;
218		secure-monitor = <&sm>;
219
220		sn: sn@14 {
221			reg = <0x14 0x10>;
222		};
223
224		eth_mac: eth_mac@34 {
225			reg = <0x34 0x10>;
226		};
227
228		bid: bid@46 {
229			reg = <0x46 0x30>;
230		};
231	};
232
233	scpi {
234		compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
235		mboxes = <&mailbox 1 &mailbox 2>;
236		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
237
238		scpi_clocks: clocks {
239			compatible = "arm,scpi-clocks";
240
241			scpi_dvfs: scpi_clocks@0 {
242				compatible = "arm,scpi-dvfs-clocks";
243				#clock-cells = <1>;
244				clock-indices = <0>;
245				clock-output-names = "vcpu";
246			};
247		};
248
249		scpi_sensors: sensors {
250			compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
251			#thermal-sensor-cells = <1>;
252		};
253	};
254
255	soc {
256		compatible = "simple-bus";
257		#address-cells = <2>;
258		#size-cells = <2>;
259		ranges;
260
261		cbus: bus@c1100000 {
262			compatible = "simple-bus";
263			reg = <0x0 0xc1100000 0x0 0x100000>;
264			#address-cells = <2>;
265			#size-cells = <2>;
266			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
267
268			gpio_intc: interrupt-controller@9880 {
269				compatible = "amlogic,meson-gpio-intc";
270				reg = <0x0 0x9880 0x0 0x10>;
271				interrupt-controller;
272				#interrupt-cells = <2>;
273				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
274				status = "disabled";
275			};
276
277			reset: reset-controller@4404 {
278				compatible = "amlogic,meson-gxbb-reset";
279				reg = <0x0 0x04404 0x0 0x9c>;
280				#reset-cells = <1>;
281			};
282
283			aiu: audio-controller@5400 {
284				compatible = "amlogic,aiu";
285				#sound-dai-cells = <2>;
286				sound-name-prefix = "AIU";
287				reg = <0x0 0x5400 0x0 0x2ac>;
288				interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
289					     <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
290				interrupt-names = "i2s", "spdif";
291				status = "disabled";
292			};
293
294			uart_A: serial@84c0 {
295				compatible = "amlogic,meson-gx-uart";
296				reg = <0x0 0x84c0 0x0 0x18>;
297				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
298				status = "disabled";
299			};
300
301			uart_B: serial@84dc {
302				compatible = "amlogic,meson-gx-uart";
303				reg = <0x0 0x84dc 0x0 0x18>;
304				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
305				status = "disabled";
306			};
307
308			i2c_A: i2c@8500 {
309				compatible = "amlogic,meson-gxbb-i2c";
310				reg = <0x0 0x08500 0x0 0x20>;
311				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
312				#address-cells = <1>;
313				#size-cells = <0>;
314				status = "disabled";
315			};
316
317			pwm_ab: pwm@8550 {
318				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
319				reg = <0x0 0x08550 0x0 0x10>;
320				#pwm-cells = <3>;
321				status = "disabled";
322			};
323
324			pwm_cd: pwm@8650 {
325				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
326				reg = <0x0 0x08650 0x0 0x10>;
327				#pwm-cells = <3>;
328				status = "disabled";
329			};
330
331			saradc: adc@8680 {
332				compatible = "amlogic,meson-saradc";
333				reg = <0x0 0x8680 0x0 0x34>;
334				#io-channel-cells = <1>;
335				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
336				status = "disabled";
337			};
338
339			pwm_ef: pwm@86c0 {
340				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
341				reg = <0x0 0x086c0 0x0 0x10>;
342				#pwm-cells = <3>;
343				status = "disabled";
344			};
345
346			uart_C: serial@8700 {
347				compatible = "amlogic,meson-gx-uart";
348				reg = <0x0 0x8700 0x0 0x18>;
349				interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
350				status = "disabled";
351			};
352
353			clock-measure@8758 {
354				compatible = "amlogic,meson-gx-clk-measure";
355				reg = <0x0 0x8758 0x0 0x10>;
356			};
357
358			i2c_B: i2c@87c0 {
359				compatible = "amlogic,meson-gxbb-i2c";
360				reg = <0x0 0x087c0 0x0 0x20>;
361				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
362				#address-cells = <1>;
363				#size-cells = <0>;
364				status = "disabled";
365			};
366
367			i2c_C: i2c@87e0 {
368				compatible = "amlogic,meson-gxbb-i2c";
369				reg = <0x0 0x087e0 0x0 0x20>;
370				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
371				#address-cells = <1>;
372				#size-cells = <0>;
373				status = "disabled";
374			};
375
376			spicc: spi@8d80 {
377				compatible = "amlogic,meson-gx-spicc";
378				reg = <0x0 0x08d80 0x0 0x80>;
379				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
380				#address-cells = <1>;
381				#size-cells = <0>;
382				status = "disabled";
383			};
384
385			spifc: spi@8c80 {
386				compatible = "amlogic,meson-gxbb-spifc";
387				reg = <0x0 0x08c80 0x0 0x80>;
388				#address-cells = <1>;
389				#size-cells = <0>;
390				status = "disabled";
391			};
392
393			watchdog@98d0 {
394				compatible = "amlogic,meson-gxbb-wdt";
395				reg = <0x0 0x098d0 0x0 0x10>;
396				clocks = <&xtal>;
397			};
398		};
399
400		gic: interrupt-controller@c4301000 {
401			compatible = "arm,gic-400";
402			reg = <0x0 0xc4301000 0 0x1000>,
403			      <0x0 0xc4302000 0 0x2000>,
404			      <0x0 0xc4304000 0 0x2000>,
405			      <0x0 0xc4306000 0 0x2000>;
406			interrupt-controller;
407			interrupts = <GIC_PPI 9
408				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
409			#interrupt-cells = <3>;
410			#address-cells = <0>;
411		};
412
413		sram: sram@c8000000 {
414			compatible = "mmio-sram";
415			reg = <0x0 0xc8000000 0x0 0x14000>;
416
417			#address-cells = <1>;
418			#size-cells = <1>;
419			ranges = <0 0x0 0xc8000000 0x14000>;
420
421			cpu_scp_lpri: scp-sram@0 {
422				compatible = "amlogic,meson-gxbb-scp-shmem";
423				reg = <0x13000 0x400>;
424			};
425
426			cpu_scp_hpri: scp-sram@200 {
427				compatible = "amlogic,meson-gxbb-scp-shmem";
428				reg = <0x13400 0x400>;
429			};
430		};
431
432		aobus: bus@c8100000 {
433			compatible = "simple-bus";
434			reg = <0x0 0xc8100000 0x0 0x100000>;
435			#address-cells = <2>;
436			#size-cells = <2>;
437			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
438
439			sysctrl_AO: sys-ctrl@0 {
440				compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
441				reg =  <0x0 0x0 0x0 0x100>;
442
443				clkc_AO: clock-controller {
444					compatible = "amlogic,meson-gx-aoclkc";
445					#clock-cells = <1>;
446					#reset-cells = <1>;
447				};
448			};
449
450			cec_AO: cec@100 {
451				compatible = "amlogic,meson-gx-ao-cec";
452				reg = <0x0 0x00100 0x0 0x14>;
453				interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
454				status = "disabled";
455			};
456
457			sec_AO: ao-secure@140 {
458				compatible = "amlogic,meson-gx-ao-secure", "syscon";
459				reg = <0x0 0x140 0x0 0x140>;
460				amlogic,has-chip-id;
461			};
462
463			uart_AO: serial@4c0 {
464				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
465				reg = <0x0 0x004c0 0x0 0x18>;
466				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
467				status = "disabled";
468			};
469
470			uart_AO_B: serial@4e0 {
471				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
472				reg = <0x0 0x004e0 0x0 0x18>;
473				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
474				status = "disabled";
475			};
476
477			i2c_AO: i2c@500 {
478				compatible = "amlogic,meson-gxbb-i2c";
479				reg = <0x0 0x500 0x0 0x20>;
480				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
481				#address-cells = <1>;
482				#size-cells = <0>;
483				status = "disabled";
484			};
485
486			pwm_AO_ab: pwm@550 {
487				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
488				reg = <0x0 0x00550 0x0 0x10>;
489				#pwm-cells = <3>;
490				status = "disabled";
491			};
492
493			ir: ir@580 {
494				compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
495				reg = <0x0 0x00580 0x0 0x40>;
496				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
497				status = "disabled";
498			};
499		};
500
501		vdec: video-codec@c8820000 {
502			compatible = "amlogic,gx-vdec";
503			reg = <0x0 0xc8820000 0x0 0x10000>,
504			      <0x0 0xc110a580 0x0 0xe4>;
505			reg-names = "dos", "esparser";
506
507			interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
508				     <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
509			interrupt-names = "vdec", "esparser";
510
511			amlogic,ao-sysctrl = <&sysctrl_AO>;
512			amlogic,canvas = <&canvas>;
513		};
514
515		periphs: bus@c8834000 {
516			compatible = "simple-bus";
517			reg = <0x0 0xc8834000 0x0 0x2000>;
518			#address-cells = <2>;
519			#size-cells = <2>;
520			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
521
522			hwrng: rng {
523				compatible = "amlogic,meson-rng";
524				reg = <0x0 0x0 0x0 0x4>;
525			};
526		};
527
528		dmcbus: bus@c8838000 {
529			compatible = "simple-bus";
530			reg = <0x0 0xc8838000 0x0 0x400>;
531			#address-cells = <2>;
532			#size-cells = <2>;
533			ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
534
535			canvas: video-lut@48 {
536				compatible = "amlogic,canvas";
537				reg = <0x0 0x48 0x0 0x14>;
538			};
539		};
540
541		hiubus: bus@c883c000 {
542			compatible = "simple-bus";
543			reg = <0x0 0xc883c000 0x0 0x2000>;
544			#address-cells = <2>;
545			#size-cells = <2>;
546			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
547
548			sysctrl: system-controller@0 {
549				compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
550				reg = <0 0 0 0x400>;
551
552				pwrc: power-controller {
553					compatible = "amlogic,meson-gxbb-pwrc";
554					#power-domain-cells = <1>;
555					amlogic,ao-sysctrl = <&sysctrl_AO>;
556				};
557			};
558
559			mailbox: mailbox@404 {
560				compatible = "amlogic,meson-gxbb-mhu";
561				reg = <0 0x404 0 0x4c>;
562				interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
563					     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
564					     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
565				#mbox-cells = <1>;
566			};
567		};
568
569		ethmac: ethernet@c9410000 {
570			compatible = "amlogic,meson-gxbb-dwmac",
571				     "snps,dwmac-3.70a",
572				     "snps,dwmac";
573			reg = <0x0 0xc9410000 0x0 0x10000>,
574			      <0x0 0xc8834540 0x0 0x4>;
575			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
576			interrupt-names = "macirq";
577			rx-fifo-depth = <4096>;
578			tx-fifo-depth = <2048>;
579			resets = <&reset RESET_ETHERNET>;
580			reset-names = "stmmaceth";
581			power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
582			status = "disabled";
583		};
584
585		apb: apb@d0000000 {
586			compatible = "simple-bus";
587			reg = <0x0 0xd0000000 0x0 0x200000>;
588			#address-cells = <2>;
589			#size-cells = <2>;
590			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
591
592			sd_emmc_a: mmc@70000 {
593				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
594				reg = <0x0 0x70000 0x0 0x800>;
595				interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
596				status = "disabled";
597			};
598
599			sd_emmc_b: mmc@72000 {
600				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
601				reg = <0x0 0x72000 0x0 0x800>;
602				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
603				status = "disabled";
604			};
605
606			sd_emmc_c: mmc@74000 {
607				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
608				reg = <0x0 0x74000 0x0 0x800>;
609				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
610				status = "disabled";
611			};
612		};
613
614		vpu: vpu@d0100000 {
615			compatible = "amlogic,meson-gx-vpu";
616			reg = <0x0 0xd0100000 0x0 0x100000>,
617			      <0x0 0xc883c000 0x0 0x1000>;
618			reg-names = "vpu", "hhi";
619			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
620			#address-cells = <1>;
621			#size-cells = <0>;
622			amlogic,canvas = <&canvas>;
623
624			/* CVBS VDAC output port */
625			cvbs_vdac_port: port@0 {
626				reg = <0>;
627			};
628
629			/* HDMI-TX output port */
630			hdmi_tx_port: port@1 {
631				reg = <1>;
632
633				hdmi_tx_out: endpoint {
634					remote-endpoint = <&hdmi_tx_in>;
635				};
636			};
637		};
638
639		hdmi_tx: hdmi-tx@c883a000 {
640			compatible = "amlogic,meson-gx-dw-hdmi";
641			reg = <0x0 0xc883a000 0x0 0x1c>;
642			interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
643			#address-cells = <1>;
644			#size-cells = <0>;
645			#sound-dai-cells = <0>;
646			sound-name-prefix = "HDMITX";
647			status = "disabled";
648
649			/* VPU VENC Input */
650			hdmi_tx_venc_port: port@0 {
651				reg = <0>;
652
653				hdmi_tx_in: endpoint {
654					remote-endpoint = <&hdmi_tx_out>;
655				};
656			};
657
658			/* TMDS Output */
659			hdmi_tx_tmds_port: port@1 {
660				reg = <1>;
661			};
662		};
663	};
664};
665