1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2// Copyright (c) 2024 Freebox SAS 3 4/* 5 * SEI codename: SEI530FB (based on SEI510) 6 * Freebox codename: fbx8am 7 * Commercial names: Freebox Pop, Player TV Free 4K 8 */ 9 10/dts-v1/; 11 12#include "meson-g12a.dtsi" 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/input/input.h> 15#include <dt-bindings/gpio/meson-g12a-gpio.h> 16#include <dt-bindings/sound/meson-g12a-tohdmitx.h> 17 18/ { 19 compatible = "freebox,fbx8am", "amlogic,g12a"; 20 model = "Freebox Player Pop"; 21 chassis-type = "embedded"; 22 23 firmware { 24 optee { 25 compatible = "linaro,optee-tz"; 26 method = "smc"; 27 }; 28 }; 29 30 gpio-keys-polled { 31 compatible = "gpio-keys-polled"; 32 poll-interval = <100>; 33 34 /* Physical user-accessible reset button near USB port */ 35 power-button { 36 label = "Reset"; 37 linux,code = <BTN_MISC>; 38 gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; 39 }; 40 }; 41 42 spdif_dit: audio-codec-2 { 43 #sound-dai-cells = <0>; 44 compatible = "linux,spdif-dit"; 45 status = "okay"; 46 sound-name-prefix = "DIT"; 47 }; 48 49 aliases { 50 serial0 = &uart_AO; 51 ethernet0 = ðmac; 52 }; 53 54 chosen { 55 stdout-path = "serial0:115200n8"; 56 }; 57 58 emmc_pwrseq: emmc-pwrseq { 59 compatible = "mmc-pwrseq-emmc"; 60 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; 61 }; 62 63 hdmi-connector { 64 compatible = "hdmi-connector"; 65 type = "a"; 66 67 port { 68 hdmi_connector_in: endpoint { 69 remote-endpoint = <&hdmi_tx_tmds_out>; 70 }; 71 }; 72 }; 73 74 memory@0 { 75 device_type = "memory"; 76 reg = <0x0 0x0 0x0 0x80000000>; 77 }; 78 79 ao_5v: regulator-ao-5v { 80 compatible = "regulator-fixed"; 81 regulator-name = "AO_5V"; 82 regulator-min-microvolt = <5000000>; 83 regulator-max-microvolt = <5000000>; 84 vin-supply = <&dc_in>; 85 regulator-always-on; 86 }; 87 88 dc_in: regulator-dc-in { 89 compatible = "regulator-fixed"; 90 regulator-name = "DC_IN"; 91 regulator-min-microvolt = <12000000>; 92 regulator-max-microvolt = <12000000>; 93 regulator-always-on; 94 }; 95 96 emmc_1v8: regulator-emmc-1v8 { 97 compatible = "regulator-fixed"; 98 regulator-name = "EMMC_1V8"; 99 regulator-min-microvolt = <1800000>; 100 regulator-max-microvolt = <1800000>; 101 vin-supply = <&vddao_3v3>; 102 regulator-always-on; 103 }; 104 105 vddao_3v3: regulator-vddao-3v3 { 106 compatible = "regulator-fixed"; 107 regulator-name = "VDDAO_3V3"; 108 regulator-min-microvolt = <3300000>; 109 regulator-max-microvolt = <3300000>; 110 vin-supply = <&ao_5v>; 111 regulator-always-on; 112 }; 113 114 vddao_3v3_t: regulator-vddao-3v3-t { 115 compatible = "regulator-fixed"; 116 regulator-name = "VDDAO_3V3_T"; 117 regulator-min-microvolt = <3300000>; 118 regulator-max-microvolt = <3300000>; 119 vin-supply = <&vddao_3v3>; 120 gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; 121 enable-active-high; 122 }; 123 124 vddcpu: regulator-vddcpu { 125 /* 126 * SY8120B1ABC DC/DC Regulator. 127 */ 128 compatible = "pwm-regulator"; 129 130 regulator-name = "VDDCPU"; 131 regulator-min-microvolt = <721000>; 132 regulator-max-microvolt = <1022000>; 133 134 pwm-supply = <&ao_5v>; 135 136 pwms = <&pwm_AO_cd 1 1250 0>; 137 pwm-dutycycle-range = <100 0>; 138 139 regulator-boot-on; 140 regulator-always-on; 141 }; 142 143 vddio_ao1v8: regulator-vddio-ao1v8 { 144 compatible = "regulator-fixed"; 145 regulator-name = "VDDIO_AO1V8"; 146 regulator-min-microvolt = <1800000>; 147 regulator-max-microvolt = <1800000>; 148 vin-supply = <&vddao_3v3>; 149 regulator-always-on; 150 }; 151 152 sdio_pwrseq: sdio-pwrseq { 153 compatible = "mmc-pwrseq-simple"; 154 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; 155 post-power-on-delay-ms = <10>; /* required for 43752 */ 156 clocks = <&wifi32k>; 157 clock-names = "ext_clock"; 158 }; 159 160 wifi32k: wifi32k { 161 compatible = "pwm-clock"; 162 #clock-cells = <0>; 163 clock-frequency = <32768>; 164 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ 165 }; 166 167 sound { 168 compatible = "amlogic,axg-sound-card"; 169 model = "fbx8am"; 170 audio-aux-devs = <&tdmout_b>; 171 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", 172 "TDMOUT_B IN 1", "FRDDR_B OUT 1", 173 "TDMOUT_B IN 2", "FRDDR_C OUT 1", 174 "TDM_B Playback", "TDMOUT_B OUT", 175 "SPDIFOUT_A IN 0", "FRDDR_A OUT 3", 176 "SPDIFOUT_A IN 1", "FRDDR_B OUT 3", 177 "SPDIFOUT_A IN 2", "FRDDR_C OUT 3"; 178 179 clocks = <&clkc CLKID_MPLL2>, 180 <&clkc CLKID_MPLL0>, 181 <&clkc CLKID_MPLL1>; 182 183 assigned-clocks = <&clkc CLKID_MPLL2>, 184 <&clkc CLKID_MPLL0>, 185 <&clkc CLKID_MPLL1>; 186 assigned-clock-parents = <0>, <0>, <0>; 187 assigned-clock-rates = <294912000>, 188 <270950400>, 189 <393216000>; 190 191 dai-link-0 { 192 sound-dai = <&frddr_a>; 193 }; 194 195 dai-link-1 { 196 sound-dai = <&frddr_b>; 197 }; 198 199 dai-link-2 { 200 sound-dai = <&frddr_c>; 201 }; 202 203 /* 8ch hdmi interface */ 204 dai-link-3 { 205 sound-dai = <&tdmif_b>; 206 dai-format = "i2s"; 207 dai-tdm-slot-tx-mask-0 = <1 1>; 208 dai-tdm-slot-tx-mask-1 = <1 1>; 209 dai-tdm-slot-tx-mask-2 = <1 1>; 210 dai-tdm-slot-tx-mask-3 = <1 1>; 211 mclk-fs = <256>; 212 213 codec { 214 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; 215 }; 216 }; 217 218 /* spdif hdmi or toslink interface */ 219 dai-link-4 { 220 sound-dai = <&spdifout_a>; 221 222 codec-0 { 223 sound-dai = <&spdif_dit>; 224 }; 225 226 codec-1 { 227 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>; 228 }; 229 }; 230 231 /* spdif hdmi interface */ 232 dai-link-5 { 233 sound-dai = <&spdifout_b>; 234 235 codec { 236 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>; 237 }; 238 }; 239 240 /* hdmi glue */ 241 dai-link-6 { 242 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; 243 244 codec { 245 sound-dai = <&hdmi_tx>; 246 }; 247 }; 248 }; 249}; 250 251&arb { 252 status = "okay"; 253}; 254 255&cecb_AO { 256 pinctrl-0 = <&cec_ao_b_h_pins>; 257 pinctrl-names = "default"; 258 status = "okay"; 259 hdmi-phandle = <&hdmi_tx>; 260}; 261 262&clkc_audio { 263 status = "okay"; 264}; 265 266&cpu0 { 267 cpu-supply = <&vddcpu>; 268 operating-points-v2 = <&cpu_opp_table>; 269 clocks = <&clkc CLKID_CPU_CLK>; 270 clock-latency = <50000>; 271}; 272 273&cpu1 { 274 cpu-supply = <&vddcpu>; 275 operating-points-v2 = <&cpu_opp_table>; 276 clocks = <&clkc CLKID_CPU_CLK>; 277 clock-latency = <50000>; 278}; 279 280&cpu2 { 281 cpu-supply = <&vddcpu>; 282 operating-points-v2 = <&cpu_opp_table>; 283 clocks = <&clkc CLKID_CPU_CLK>; 284 clock-latency = <50000>; 285}; 286 287&cpu3 { 288 cpu-supply = <&vddcpu>; 289 operating-points-v2 = <&cpu_opp_table>; 290 clocks = <&clkc CLKID_CPU_CLK>; 291 clock-latency = <50000>; 292}; 293 294ðmac { 295 status = "okay"; 296 phy-handle = <&internal_ephy>; 297 phy-mode = "rmii"; 298}; 299 300&frddr_a { 301 status = "okay"; 302}; 303 304&frddr_b { 305 status = "okay"; 306}; 307 308&frddr_c { 309 status = "okay"; 310}; 311 312&spdifout_a { 313 pinctrl-0 = <&spdif_out_h_pins>; 314 pinctrl-names = "default"; 315 status = "okay"; 316}; 317 318&spdifout_b { 319 status = "okay"; 320}; 321 322&hdmi_tx { 323 status = "okay"; 324 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; 325 pinctrl-names = "default"; 326}; 327 328&hdmi_tx_tmds_port { 329 hdmi_tx_tmds_out: endpoint { 330 remote-endpoint = <&hdmi_connector_in>; 331 }; 332}; 333 334&i2c3 { 335 status = "okay"; 336 pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; 337 pinctrl-names = "default"; 338}; 339 340&ir { 341 status = "okay"; 342 pinctrl-0 = <&remote_input_ao_pins>; 343 pinctrl-names = "default"; 344}; 345 346&pwm_AO_cd { 347 pinctrl-0 = <&pwm_ao_d_e_pins>; 348 pinctrl-names = "default"; 349 clocks = <&xtal>; 350 clock-names = "clkin1"; 351 status = "okay"; 352}; 353 354&pwm_ef { 355 status = "okay"; 356 pinctrl-0 = <&pwm_e_pins>; 357 pinctrl-names = "default"; 358 clocks = <&xtal>; 359 clock-names = "clkin0"; 360}; 361 362&pdm { 363 pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>, 364 <&pdm_din2_z_pins>, <&pdm_din3_z_pins>, 365 <&pdm_dclk_z_pins>; 366 pinctrl-names = "default"; 367 status = "okay"; 368}; 369 370&saradc { 371 status = "okay"; 372 vref-supply = <&vddio_ao1v8>; 373}; 374 375/* SDIO */ 376&sd_emmc_a { 377 status = "okay"; 378 pinctrl-0 = <&sdio_pins>; 379 pinctrl-1 = <&sdio_clk_gate_pins>; 380 pinctrl-names = "default", "clk-gate"; 381 #address-cells = <1>; 382 #size-cells = <0>; 383 384 bus-width = <4>; 385 cap-sd-highspeed; 386 sd-uhs-sdr50; 387 max-frequency = <100000000>; 388 389 non-removable; 390 disable-wp; 391 392 /* WiFi firmware requires power to be kept while in suspend */ 393 keep-power-in-suspend; 394 395 mmc-pwrseq = <&sdio_pwrseq>; 396 397 vmmc-supply = <&vddao_3v3>; 398 vqmmc-supply = <&vddio_ao1v8>; 399}; 400 401/* SD card */ 402&sd_emmc_b { 403 status = "okay"; 404 pinctrl-0 = <&sdcard_c_pins>; 405 pinctrl-1 = <&sdcard_clk_gate_c_pins>; 406 pinctrl-names = "default", "clk-gate"; 407 408 bus-width = <4>; 409 cap-sd-highspeed; 410 max-frequency = <50000000>; 411 disable-wp; 412 413 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; 414 vmmc-supply = <&vddao_3v3>; 415 vqmmc-supply = <&vddao_3v3>; 416}; 417 418/* eMMC */ 419&sd_emmc_c { 420 status = "okay"; 421 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; 422 pinctrl-1 = <&emmc_clk_gate_pins>; 423 pinctrl-names = "default", "clk-gate"; 424 425 bus-width = <8>; 426 cap-mmc-highspeed; 427 mmc-ddr-1_8v; 428 mmc-hs200-1_8v; 429 max-frequency = <200000000>; 430 non-removable; 431 disable-wp; 432 433 mmc-pwrseq = <&emmc_pwrseq>; 434 vmmc-supply = <&vddao_3v3>; 435 vqmmc-supply = <&emmc_1v8>; 436}; 437 438&tdmif_b { 439 status = "okay"; 440}; 441 442&tdmout_b { 443 status = "okay"; 444}; 445 446&tohdmitx { 447 status = "okay"; 448}; 449 450&uart_A { 451 status = "okay"; 452 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; 453 pinctrl-names = "default"; 454 uart-has-rtscts; 455}; 456 457&uart_AO { 458 status = "okay"; 459 pinctrl-0 = <&uart_ao_a_pins>; 460 pinctrl-names = "default"; 461}; 462 463&usb { 464 status = "okay"; 465 dr_mode = "host"; 466}; 467