1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved. 4 */ 5 6#include <dt-bindings/clock/amlogic,a1-pll-clkc.h> 7#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h> 8#include <dt-bindings/gpio/meson-a1-gpio.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/power/meson-a1-power.h> 12#include <dt-bindings/reset/amlogic,meson-a1-reset.h> 13 14/ { 15 compatible = "amlogic,a1"; 16 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 20 21 cpus { 22 #address-cells = <2>; 23 #size-cells = <0>; 24 25 cpu0: cpu@0 { 26 device_type = "cpu"; 27 compatible = "arm,cortex-a35"; 28 reg = <0x0 0x0>; 29 enable-method = "psci"; 30 next-level-cache = <&l2>; 31 #cooling-cells = <2>; 32 }; 33 34 cpu1: cpu@1 { 35 device_type = "cpu"; 36 compatible = "arm,cortex-a35"; 37 reg = <0x0 0x1>; 38 enable-method = "psci"; 39 next-level-cache = <&l2>; 40 #cooling-cells = <2>; 41 }; 42 43 l2: l2-cache0 { 44 compatible = "cache"; 45 cache-level = <2>; 46 cache-unified; 47 }; 48 }; 49 50 efuse: efuse { 51 compatible = "amlogic,meson-gxbb-efuse"; 52 clocks = <&clkc_periphs CLKID_OTP>; 53 #address-cells = <1>; 54 #size-cells = <1>; 55 secure-monitor = <&sm>; 56 power-domains = <&pwrc PWRC_OTP_ID>; 57 }; 58 59 psci { 60 compatible = "arm,psci-1.0"; 61 method = "smc"; 62 }; 63 64 reserved-memory { 65 #address-cells = <2>; 66 #size-cells = <2>; 67 ranges; 68 69 linux,cma { 70 compatible = "shared-dma-pool"; 71 reusable; 72 size = <0x0 0x800000>; 73 alignment = <0x0 0x400000>; 74 linux,cma-default; 75 }; 76 }; 77 78 sm: secure-monitor { 79 compatible = "amlogic,meson-gxbb-sm"; 80 81 pwrc: power-controller { 82 compatible = "amlogic,meson-a1-pwrc"; 83 #power-domain-cells = <1>; 84 }; 85 }; 86 87 soc { 88 compatible = "simple-bus"; 89 #address-cells = <2>; 90 #size-cells = <2>; 91 ranges; 92 93 spifc: spi@fd000400 { 94 compatible = "amlogic,a1-spifc"; 95 reg = <0x0 0xfd000400 0x0 0x290>; 96 clocks = <&clkc_periphs CLKID_SPIFC>; 97 #address-cells = <1>; 98 #size-cells = <0>; 99 power-domains = <&pwrc PWRC_SPIFC_ID>; 100 status = "disabled"; 101 }; 102 103 apb: bus@fe000000 { 104 compatible = "simple-bus"; 105 reg = <0x0 0xfe000000 0x0 0x1000000>; 106 #address-cells = <2>; 107 #size-cells = <2>; 108 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>; 109 110 reset: reset-controller@0 { 111 compatible = "amlogic,meson-a1-reset"; 112 reg = <0x0 0x0 0x0 0x8c>; 113 #reset-cells = <1>; 114 }; 115 116 periphs_pinctrl: pinctrl@400 { 117 compatible = "amlogic,meson-a1-periphs-pinctrl"; 118 #address-cells = <2>; 119 #size-cells = <2>; 120 ranges; 121 122 gpio: bank@400 { 123 reg = <0x0 0x0400 0x0 0x003c>, 124 <0x0 0x0480 0x0 0x0118>; 125 reg-names = "mux", "gpio"; 126 gpio-controller; 127 #gpio-cells = <2>; 128 gpio-ranges = <&periphs_pinctrl 0 0 62>; 129 }; 130 131 i2c0_f11_pins: i2c0-f11 { 132 mux { 133 groups = "i2c0_sck_f11", 134 "i2c0_sda_f12"; 135 function = "i2c0"; 136 bias-pull-up; 137 drive-strength-microamp = <3000>; 138 }; 139 }; 140 141 i2c0_f9_pins: i2c0-f9 { 142 mux { 143 groups = "i2c0_sck_f9", 144 "i2c0_sda_f10"; 145 function = "i2c0"; 146 bias-pull-up; 147 drive-strength-microamp = <3000>; 148 }; 149 }; 150 151 i2c1_x_pins: i2c1-x { 152 mux { 153 groups = "i2c1_sck_x", 154 "i2c1_sda_x"; 155 function = "i2c1"; 156 bias-pull-up; 157 drive-strength-microamp = <3000>; 158 }; 159 }; 160 161 i2c1_a_pins: i2c1-a { 162 mux { 163 groups = "i2c1_sck_a", 164 "i2c1_sda_a"; 165 function = "i2c1"; 166 bias-pull-up; 167 drive-strength-microamp = <3000>; 168 }; 169 }; 170 171 i2c2_x0_pins: i2c2-x0 { 172 mux { 173 groups = "i2c2_sck_x0", 174 "i2c2_sda_x1"; 175 function = "i2c2"; 176 bias-pull-up; 177 drive-strength-microamp = <3000>; 178 }; 179 }; 180 181 i2c2_x15_pins: i2c2-x15 { 182 mux { 183 groups = "i2c2_sck_x15", 184 "i2c2_sda_x16"; 185 function = "i2c2"; 186 bias-pull-up; 187 drive-strength-microamp = <3000>; 188 }; 189 }; 190 191 i2c2_a4_pins: i2c2-a4 { 192 mux { 193 groups = "i2c2_sck_a4", 194 "i2c2_sda_a5"; 195 function = "i2c2"; 196 bias-pull-up; 197 drive-strength-microamp = <3000>; 198 }; 199 }; 200 201 i2c2_a8_pins: i2c2-a8 { 202 mux { 203 groups = "i2c2_sck_a8", 204 "i2c2_sda_a9"; 205 function = "i2c2"; 206 bias-pull-up; 207 drive-strength-microamp = <3000>; 208 }; 209 }; 210 211 i2c3_x_pins: i2c3-x { 212 mux { 213 groups = "i2c3_sck_x", 214 "i2c3_sda_x"; 215 function = "i2c3"; 216 bias-pull-up; 217 drive-strength-microamp = <3000>; 218 }; 219 }; 220 221 i2c3_f_pins: i2c3-f { 222 mux { 223 groups = "i2c3_sck_f", 224 "i2c3_sda_f"; 225 function = "i2c3"; 226 bias-pull-up; 227 drive-strength-microamp = <3000>; 228 }; 229 }; 230 231 uart_a_pins: uart-a { 232 mux { 233 groups = "uart_a_tx", 234 "uart_a_rx"; 235 function = "uart_a"; 236 }; 237 }; 238 239 uart_a_cts_rts_pins: uart-a-cts-rts { 240 mux { 241 groups = "uart_a_cts", 242 "uart_a_rts"; 243 function = "uart_a"; 244 bias-pull-down; 245 }; 246 }; 247 248 pwm_a_pins1: pwm-a-pins1 { 249 mux { 250 groups = "pwm_a_x6"; 251 function = "pwm_a"; 252 }; 253 }; 254 255 pwm_a_pins2: pwm-a-pins2 { 256 mux { 257 groups = "pwm_a_x7"; 258 function = "pwm_a"; 259 }; 260 }; 261 262 pwm_a_pins3: pwm-a-pins3 { 263 mux { 264 groups = "pwm_a_f10"; 265 function = "pwm_a"; 266 }; 267 }; 268 269 pwm_a_pins4: pwm-a-pins4 { 270 mux { 271 groups = "pwm_a_f6"; 272 function = "pwm_a"; 273 }; 274 }; 275 276 pwm_a_pins5: pwm-a-pins5 { 277 mux { 278 groups = "pwm_a_a"; 279 function = "pwm_a"; 280 }; 281 }; 282 283 pwm_b_pins1: pwm-b-pins1 { 284 mux { 285 groups = "pwm_b_x"; 286 function = "pwm_b"; 287 }; 288 }; 289 290 pwm_b_pins2: pwm-b-pins2 { 291 mux { 292 groups = "pwm_b_f"; 293 function = "pwm_b"; 294 }; 295 }; 296 297 pwm_b_pins3: pwm-b-pins3 { 298 mux { 299 groups = "pwm_b_a"; 300 function = "pwm_b"; 301 }; 302 }; 303 304 pwm_c_pins1: pwm-c-pins1 { 305 mux { 306 groups = "pwm_c_x"; 307 function = "pwm_c"; 308 }; 309 }; 310 311 pwm_c_pins2: pwm-c-pins2 { 312 mux { 313 groups = "pwm_c_f3"; 314 function = "pwm_c"; 315 }; 316 }; 317 318 pwm_c_pins3: pwm-c-pins3 { 319 mux { 320 groups = "pwm_c_f8"; 321 function = "pwm_c"; 322 }; 323 }; 324 325 pwm_c_pins4: pwm-c-pins4 { 326 mux { 327 groups = "pwm_c_a"; 328 function = "pwm_c"; 329 }; 330 }; 331 332 pwm_d_pins1: pwm-d-pins1 { 333 mux { 334 groups = "pwm_d_x15"; 335 function = "pwm_d"; 336 }; 337 }; 338 339 pwm_d_pins2: pwm-d-pins2 { 340 mux { 341 groups = "pwm_d_x13"; 342 function = "pwm_d"; 343 }; 344 }; 345 346 pwm_d_pins3: pwm-d-pins3 { 347 mux { 348 groups = "pwm_d_x10"; 349 function = "pwm_d"; 350 }; 351 }; 352 353 pwm_d_pins4: pwm-d-pins4 { 354 mux { 355 groups = "pwm_d_f"; 356 function = "pwm_d"; 357 }; 358 }; 359 360 pwm_e_pins1: pwm-e-pins1 { 361 mux { 362 groups = "pwm_e_p"; 363 function = "pwm_e"; 364 }; 365 }; 366 367 pwm_e_pins2: pwm-e-pins2 { 368 mux { 369 groups = "pwm_e_x16"; 370 function = "pwm_e"; 371 }; 372 }; 373 374 pwm_e_pins3: pwm-e-pins3 { 375 mux { 376 groups = "pwm_e_x14"; 377 function = "pwm_e"; 378 }; 379 }; 380 381 pwm_e_pins4: pwm-e-pins4 { 382 mux { 383 groups = "pwm_e_x2"; 384 function = "pwm_e"; 385 }; 386 }; 387 388 pwm_e_pins5: pwm-e-pins5 { 389 mux { 390 groups = "pwm_e_f"; 391 function = "pwm_e"; 392 }; 393 }; 394 395 pwm_e_pins6: pwm-e-pins6 { 396 mux { 397 groups = "pwm_e_a"; 398 function = "pwm_e"; 399 }; 400 }; 401 402 pwm_f_pins1: pwm-f-pins1 { 403 mux { 404 groups = "pwm_f_b"; 405 function = "pwm_f"; 406 }; 407 }; 408 409 pwm_f_pins2: pwm-f-pins2 { 410 mux { 411 groups = "pwm_f_x"; 412 function = "pwm_f"; 413 }; 414 }; 415 416 pwm_f_pins3: pwm-f-pins3 { 417 mux { 418 groups = "pwm_f_f4"; 419 function = "pwm_f"; 420 }; 421 }; 422 423 pwm_f_pins4: pwm-f-pins4 { 424 mux { 425 groups = "pwm_f_f12"; 426 function = "pwm_f"; 427 }; 428 }; 429 430 sdio_pins: sdio { 431 mux0 { 432 groups = "sdcard_d0_x", 433 "sdcard_d1_x", 434 "sdcard_d2_x", 435 "sdcard_d3_x", 436 "sdcard_cmd_x"; 437 function = "sdcard"; 438 bias-pull-up; 439 }; 440 441 mux1 { 442 groups = "sdcard_clk_x"; 443 function = "sdcard"; 444 bias-disable; 445 }; 446 }; 447 448 sdio_clk_gate_pins: sdio-clk-gate { 449 mux { 450 groups = "sdcard_clk_x"; 451 function = "sdcard"; 452 bias-pull-down; 453 }; 454 }; 455 456 spifc_pins: spifc { 457 mux { 458 groups = "spif_mo", 459 "spif_mi", 460 "spif_clk", 461 "spif_cs", 462 "spif_hold_n", 463 "spif_wp_n"; 464 function = "spif"; 465 }; 466 }; 467 }; 468 469 gpio_intc: interrupt-controller@440 { 470 compatible = "amlogic,meson-a1-gpio-intc", 471 "amlogic,meson-gpio-intc"; 472 reg = <0x0 0x0440 0x0 0x14>; 473 interrupt-controller; 474 #interrupt-cells = <2>; 475 amlogic,channel-interrupts = 476 <49 50 51 52 53 54 55 56>; 477 }; 478 479 clkc_periphs: clock-controller@800 { 480 compatible = "amlogic,a1-peripherals-clkc"; 481 reg = <0 0x800 0 0x104>; 482 #clock-cells = <1>; 483 clocks = <&clkc_pll CLKID_FCLK_DIV2>, 484 <&clkc_pll CLKID_FCLK_DIV3>, 485 <&clkc_pll CLKID_FCLK_DIV5>, 486 <&clkc_pll CLKID_FCLK_DIV7>, 487 <&clkc_pll CLKID_HIFI_PLL>, 488 <&xtal>; 489 clock-names = "fclk_div2", "fclk_div3", 490 "fclk_div5", "fclk_div7", 491 "hifi_pll", "xtal"; 492 }; 493 494 i2c0: i2c@1400 { 495 compatible = "amlogic,meson-axg-i2c"; 496 status = "disabled"; 497 reg = <0x0 0x1400 0x0 0x20>; 498 interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; 499 #address-cells = <1>; 500 #size-cells = <0>; 501 clocks = <&clkc_periphs CLKID_I2C_M_A>; 502 power-domains = <&pwrc PWRC_I2C_ID>; 503 }; 504 505 uart_AO: serial@1c00 { 506 compatible = "amlogic,meson-a1-uart", 507 "amlogic,meson-ao-uart"; 508 reg = <0x0 0x1c00 0x0 0x18>; 509 interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; 510 clocks = <&xtal>, <&xtal>, <&xtal>; 511 clock-names = "xtal", "pclk", "baud"; 512 status = "disabled"; 513 }; 514 515 uart_AO_B: serial@2000 { 516 compatible = "amlogic,meson-a1-uart", 517 "amlogic,meson-ao-uart"; 518 reg = <0x0 0x2000 0x0 0x18>; 519 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 520 clocks = <&xtal>, <&xtal>, <&xtal>; 521 clock-names = "xtal", "pclk", "baud"; 522 status = "disabled"; 523 }; 524 525 pwm_ab: pwm@2400 { 526 compatible = "amlogic,meson-a1-pwm", 527 "amlogic,meson-s4-pwm"; 528 reg = <0x0 0x2400 0x0 0x24>; 529 #pwm-cells = <3>; 530 clocks = <&clkc_periphs CLKID_PWM_A>, 531 <&clkc_periphs CLKID_PWM_B>; 532 power-domains = <&pwrc PWRC_I2C_ID>; 533 status = "disabled"; 534 }; 535 536 pwm_cd: pwm@2800 { 537 compatible = "amlogic,meson-a1-pwm", 538 "amlogic,meson-s4-pwm"; 539 reg = <0x0 0x2800 0x0 0x24>; 540 #pwm-cells = <3>; 541 clocks = <&clkc_periphs CLKID_PWM_C>, 542 <&clkc_periphs CLKID_PWM_D>; 543 power-domains = <&pwrc PWRC_I2C_ID>; 544 status = "disabled"; 545 }; 546 547 saradc: adc@2c00 { 548 compatible = "amlogic,meson-g12a-saradc", 549 "amlogic,meson-saradc"; 550 reg = <0x0 0x2c00 0x0 0x48>; 551 #io-channel-cells = <1>; 552 power-domains = <&pwrc PWRC_I2C_ID>; 553 interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>; 554 clocks = <&xtal>, 555 <&clkc_periphs CLKID_SARADC_EN>, 556 <&clkc_periphs CLKID_SARADC>, 557 <&clkc_periphs CLKID_SARADC_SEL>; 558 clock-names = "clkin", "core", 559 "adc_clk", "adc_sel"; 560 status = "disabled"; 561 }; 562 563 i2c1: i2c@5c00 { 564 compatible = "amlogic,meson-axg-i2c"; 565 status = "disabled"; 566 reg = <0x0 0x5c00 0x0 0x20>; 567 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; 568 #address-cells = <1>; 569 #size-cells = <0>; 570 clocks = <&clkc_periphs CLKID_I2C_M_B>; 571 power-domains = <&pwrc PWRC_I2C_ID>; 572 }; 573 574 i2c2: i2c@6800 { 575 compatible = "amlogic,meson-axg-i2c"; 576 status = "disabled"; 577 reg = <0x0 0x6800 0x0 0x20>; 578 interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>; 579 #address-cells = <1>; 580 #size-cells = <0>; 581 clocks = <&clkc_periphs CLKID_I2C_M_C>; 582 power-domains = <&pwrc PWRC_I2C_ID>; 583 }; 584 585 i2c3: i2c@6c00 { 586 compatible = "amlogic,meson-axg-i2c"; 587 status = "disabled"; 588 reg = <0x0 0x6c00 0x0 0x20>; 589 interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; 590 #address-cells = <1>; 591 #size-cells = <0>; 592 clocks = <&clkc_periphs CLKID_I2C_M_D>; 593 power-domains = <&pwrc PWRC_I2C_ID>; 594 }; 595 596 usb2_phy1: phy@4000 { 597 compatible = "amlogic,a1-usb2-phy"; 598 clocks = <&clkc_periphs CLKID_USB_PHY_IN>; 599 clock-names = "xtal"; 600 reg = <0x0 0x4000 0x0 0x60>; 601 resets = <&reset RESET_USBPHY>; 602 reset-names = "phy"; 603 #phy-cells = <0>; 604 power-domains = <&pwrc PWRC_USB_ID>; 605 }; 606 607 cpu_temp: temperature-sensor@4c00 { 608 compatible = "amlogic,a1-cpu-thermal"; 609 reg = <0x0 0x4c00 0x0 0x50>; 610 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 611 clocks = <&clkc_periphs CLKID_TS>; 612 assigned-clocks = <&clkc_periphs CLKID_TS>; 613 assigned-clock-rates = <500000>; 614 #thermal-sensor-cells = <0>; 615 amlogic,ao-secure = <&sec_AO>; 616 power-domains = <&pwrc PWRC_I2C_ID>; 617 }; 618 619 hwrng: rng@5118 { 620 compatible = "amlogic,meson-rng"; 621 reg = <0x0 0x5118 0x0 0x4>; 622 power-domains = <&pwrc PWRC_OTP_ID>; 623 }; 624 625 sec_AO: ao-secure@5a20 { 626 compatible = "amlogic,meson-gx-ao-secure", "syscon"; 627 reg = <0x0 0x5a20 0x0 0x140>; 628 amlogic,has-chip-id; 629 }; 630 631 pwm_ef: pwm@5400 { 632 compatible = "amlogic,meson-a1-pwm", 633 "amlogic,meson-s4-pwm"; 634 reg = <0x0 0x5400 0x0 0x24>; 635 #pwm-cells = <3>; 636 clocks = <&clkc_periphs CLKID_PWM_E>, 637 <&clkc_periphs CLKID_PWM_F>; 638 power-domains = <&pwrc PWRC_I2C_ID>; 639 status = "disabled"; 640 }; 641 642 clkc_pll: pll-clock-controller@7c80 { 643 compatible = "amlogic,a1-pll-clkc"; 644 reg = <0 0x7c80 0 0x18c>; 645 #clock-cells = <1>; 646 clocks = <&clkc_periphs CLKID_FIXPLL_IN>, 647 <&clkc_periphs CLKID_HIFIPLL_IN>; 648 clock-names = "fixpll_in", "hifipll_in"; 649 }; 650 651 sd_emmc: mmc@10000 { 652 compatible = "amlogic,meson-axg-mmc"; 653 reg = <0x0 0x10000 0x0 0x800>; 654 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 655 clocks = <&clkc_periphs CLKID_SD_EMMC_A>, 656 <&clkc_periphs CLKID_SD_EMMC>, 657 <&clkc_pll CLKID_FCLK_DIV2>; 658 clock-names = "core", 659 "clkin0", 660 "clkin1"; 661 assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_SEL2>; 662 assigned-clock-parents = <&xtal>; 663 resets = <&reset RESET_SD_EMMC_A>; 664 power-domains = <&pwrc PWRC_SD_EMMC_ID>; 665 status = "disabled"; 666 }; 667 }; 668 669 usb: usb@fe004400 { 670 status = "disabled"; 671 compatible = "amlogic,meson-a1-usb-ctrl"; 672 reg = <0x0 0xfe004400 0x0 0xa0>; 673 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 674 #address-cells = <2>; 675 #size-cells = <2>; 676 ranges; 677 678 clocks = <&clkc_periphs CLKID_USB_CTRL>, 679 <&clkc_periphs CLKID_USB_BUS>, 680 <&clkc_periphs CLKID_USB_CTRL_IN>; 681 clock-names = "usb_ctrl", "usb_bus", "xtal_usb_ctrl"; 682 assigned-clocks = <&clkc_periphs CLKID_USB_BUS>; 683 assigned-clock-rates = <64000000>; 684 resets = <&reset RESET_USBCTRL>; 685 686 dr_mode = "otg"; 687 688 phys = <&usb2_phy1>; 689 phy-names = "usb2-phy1"; 690 691 dwc3: usb@ff400000 { 692 compatible = "snps,dwc3"; 693 reg = <0x0 0xff400000 0x0 0x100000>; 694 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 695 dr_mode = "host"; 696 snps,dis_u2_susphy_quirk; 697 snps,quirk-frame-length-adjustment = <0x20>; 698 snps,parkmode-disable-ss-quirk; 699 }; 700 701 dwc2: usb@ff500000 { 702 compatible = "amlogic,meson-a1-usb", "snps,dwc2"; 703 reg = <0x0 0xff500000 0x0 0x40000>; 704 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 705 phys = <&usb2_phy1>; 706 phy-names = "usb2-phy"; 707 clocks = <&clkc_periphs CLKID_USB_PHY>; 708 clock-names = "otg"; 709 dr_mode = "peripheral"; 710 g-rx-fifo-size = <192>; 711 g-np-tx-fifo-size = <128>; 712 g-tx-fifo-size = <128 128 16 16 16>; 713 }; 714 }; 715 716 gic: interrupt-controller@ff901000 { 717 compatible = "arm,gic-400"; 718 reg = <0x0 0xff901000 0x0 0x1000>, 719 <0x0 0xff902000 0x0 0x2000>, 720 <0x0 0xff904000 0x0 0x2000>, 721 <0x0 0xff906000 0x0 0x2000>; 722 interrupt-controller; 723 interrupts = <GIC_PPI 9 724 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 725 #interrupt-cells = <3>; 726 #address-cells = <0>; 727 }; 728 }; 729 730 timer { 731 compatible = "arm,armv8-timer"; 732 interrupts = <GIC_PPI 13 733 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 734 <GIC_PPI 14 735 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 736 <GIC_PPI 11 737 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 738 <GIC_PPI 10 739 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 740 }; 741 742 xtal: xtal-clk { 743 compatible = "fixed-clock"; 744 clock-frequency = <24000000>; 745 clock-output-names = "xtal"; 746 #clock-cells = <0>; 747 }; 748}; 749