1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved. 4 */ 5 6#include <dt-bindings/interrupt-controller/arm-gic.h> 7 8/ { 9 interrupt-parent = <&gic>; 10 #address-cells = <2>; 11 #size-cells = <2>; 12 13 cpus { 14 #address-cells = <0x2>; 15 #size-cells = <0x0>; 16 17 cpu-map { 18 cluster0 { 19 core0 { 20 cpu = <&cpu100>; 21 }; 22 core1 { 23 cpu = <&cpu101>; 24 }; 25 core2 { 26 cpu = <&cpu102>; 27 }; 28 core3 { 29 cpu = <&cpu103>; 30 }; 31 }; 32 33 cluster1 { 34 core0 { 35 cpu = <&cpu0>; 36 }; 37 core1 { 38 cpu = <&cpu1>; 39 }; 40 core2 { 41 cpu = <&cpu2>; 42 }; 43 core3 { 44 cpu = <&cpu3>; 45 }; 46 }; 47 }; 48 49 cpu100: cpu@100 { 50 device_type = "cpu"; 51 compatible = "arm,cortex-a53"; 52 reg = <0x0 0x100>; 53 enable-method = "psci"; 54 }; 55 56 cpu101: cpu@101{ 57 device_type = "cpu"; 58 compatible = "arm,cortex-a53"; 59 reg = <0x0 0x101>; 60 enable-method = "psci"; 61 }; 62 63 cpu102: cpu@102 { 64 device_type = "cpu"; 65 compatible = "arm,cortex-a53"; 66 reg = <0x0 0x102>; 67 enable-method = "psci"; 68 }; 69 70 cpu103: cpu@103 { 71 device_type = "cpu"; 72 compatible = "arm,cortex-a53"; 73 reg = <0x0 0x103>; 74 enable-method = "psci"; 75 }; 76 77 cpu0: cpu@0 { 78 device_type = "cpu"; 79 compatible = "arm,cortex-a73"; 80 reg = <0x0 0x0>; 81 enable-method = "psci"; 82 }; 83 84 cpu1: cpu@1 { 85 device_type = "cpu"; 86 compatible = "arm,cortex-a73"; 87 reg = <0x0 0x1>; 88 enable-method = "psci"; 89 }; 90 91 cpu2: cpu@2 { 92 device_type = "cpu"; 93 compatible = "arm,cortex-a73"; 94 reg = <0x0 0x2>; 95 enable-method = "psci"; 96 }; 97 98 cpu3: cpu@3 { 99 device_type = "cpu"; 100 compatible = "arm,cortex-a73"; 101 reg = <0x0 0x3>; 102 enable-method = "psci"; 103 }; 104 }; 105 106 timer { 107 compatible = "arm,armv8-timer"; 108 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 109 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 110 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 111 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 112 }; 113 114 psci { 115 compatible = "arm,psci-1.0"; 116 method = "smc"; 117 }; 118 119 sm: secure-monitor { 120 compatible = "amlogic,meson-gxbb-sm"; 121 }; 122 123 soc { 124 compatible = "simple-bus"; 125 #address-cells = <2>; 126 #size-cells = <2>; 127 ranges; 128 129 gic: interrupt-controller@fff01000 { 130 compatible = "arm,gic-400"; 131 #interrupt-cells = <3>; 132 #address-cells = <0>; 133 interrupt-controller; 134 reg = <0x0 0xfff01000 0 0x1000>, 135 <0x0 0xfff02000 0 0x0100>; 136 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 137 }; 138 139 apb4: bus@fe000000 { 140 compatible = "simple-bus"; 141 reg = <0x0 0xfe000000 0x0 0x480000>; 142 #address-cells = <2>; 143 #size-cells = <2>; 144 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; 145 146 uart_a: serial@78000 { 147 compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart"; 148 reg = <0x0 0x78000 0x0 0x18>; 149 interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; 150 status = "disabled"; 151 }; 152 }; 153 154 }; 155}; 156