1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved. 4 */ 5 6#include <dt-bindings/interrupt-controller/arm-gic.h> 7#include <dt-bindings/power/amlogic,t7-pwrc.h> 8#include "amlogic-t7-reset.h" 9 10/ { 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cells = <2>; 14 15 cpus { 16 #address-cells = <0x2>; 17 #size-cells = <0x0>; 18 19 cpu-map { 20 cluster0 { 21 core0 { 22 cpu = <&cpu100>; 23 }; 24 core1 { 25 cpu = <&cpu101>; 26 }; 27 core2 { 28 cpu = <&cpu102>; 29 }; 30 core3 { 31 cpu = <&cpu103>; 32 }; 33 }; 34 35 cluster1 { 36 core0 { 37 cpu = <&cpu0>; 38 }; 39 core1 { 40 cpu = <&cpu1>; 41 }; 42 core2 { 43 cpu = <&cpu2>; 44 }; 45 core3 { 46 cpu = <&cpu3>; 47 }; 48 }; 49 }; 50 51 cpu100: cpu@100 { 52 device_type = "cpu"; 53 compatible = "arm,cortex-a53"; 54 reg = <0x0 0x100>; 55 enable-method = "psci"; 56 }; 57 58 cpu101: cpu@101 { 59 device_type = "cpu"; 60 compatible = "arm,cortex-a53"; 61 reg = <0x0 0x101>; 62 enable-method = "psci"; 63 }; 64 65 cpu102: cpu@102 { 66 device_type = "cpu"; 67 compatible = "arm,cortex-a53"; 68 reg = <0x0 0x102>; 69 enable-method = "psci"; 70 }; 71 72 cpu103: cpu@103 { 73 device_type = "cpu"; 74 compatible = "arm,cortex-a53"; 75 reg = <0x0 0x103>; 76 enable-method = "psci"; 77 }; 78 79 cpu0: cpu@0 { 80 device_type = "cpu"; 81 compatible = "arm,cortex-a73"; 82 reg = <0x0 0x0>; 83 enable-method = "psci"; 84 }; 85 86 cpu1: cpu@1 { 87 device_type = "cpu"; 88 compatible = "arm,cortex-a73"; 89 reg = <0x0 0x1>; 90 enable-method = "psci"; 91 }; 92 93 cpu2: cpu@2 { 94 device_type = "cpu"; 95 compatible = "arm,cortex-a73"; 96 reg = <0x0 0x2>; 97 enable-method = "psci"; 98 }; 99 100 cpu3: cpu@3 { 101 device_type = "cpu"; 102 compatible = "arm,cortex-a73"; 103 reg = <0x0 0x3>; 104 enable-method = "psci"; 105 }; 106 }; 107 108 timer { 109 compatible = "arm,armv8-timer"; 110 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 111 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 112 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 113 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 114 }; 115 116 psci { 117 compatible = "arm,psci-1.0"; 118 method = "smc"; 119 }; 120 121 sm: secure-monitor { 122 compatible = "amlogic,meson-gxbb-sm"; 123 124 pwrc: power-controller { 125 compatible = "amlogic,t7-pwrc"; 126 #power-domain-cells = <1>; 127 }; 128 }; 129 130 soc { 131 compatible = "simple-bus"; 132 #address-cells = <2>; 133 #size-cells = <2>; 134 ranges; 135 136 gic: interrupt-controller@fff01000 { 137 compatible = "arm,gic-400"; 138 #interrupt-cells = <3>; 139 #address-cells = <0>; 140 interrupt-controller; 141 reg = <0x0 0xfff01000 0 0x1000>, 142 <0x0 0xfff02000 0 0x0100>; 143 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 144 }; 145 146 apb4: bus@fe000000 { 147 compatible = "simple-bus"; 148 reg = <0x0 0xfe000000 0x0 0x480000>; 149 #address-cells = <2>; 150 #size-cells = <2>; 151 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; 152 153 reset: reset-controller@2000 { 154 compatible = "amlogic,t7-reset"; 155 reg = <0x0 0x2000 0x0 0x98>; 156 #reset-cells = <1>; 157 }; 158 159 watchdog@2100 { 160 compatible = "amlogic,t7-wdt"; 161 reg = <0x0 0x2100 0x0 0x10>; 162 clocks = <&xtal>; 163 }; 164 165 periphs_pinctrl: pinctrl@4000 { 166 compatible = "amlogic,t7-periphs-pinctrl"; 167 #address-cells = <2>; 168 #size-cells = <2>; 169 ranges; 170 171 gpio: bank@4000 { 172 reg = <0x0 0x4000 0x0 0x0064>, 173 <0x0 0x40c0 0x0 0x0220>; 174 reg-names = "mux", "gpio"; 175 gpio-controller; 176 #gpio-cells = <2>; 177 gpio-ranges = <&periphs_pinctrl 0 0 157>; 178 }; 179 }; 180 181 gpio_intc: interrupt-controller@4080 { 182 compatible = "amlogic,t7-gpio-intc", 183 "amlogic,meson-gpio-intc"; 184 reg = <0x0 0x4080 0x0 0x20>; 185 interrupt-controller; 186 #interrupt-cells = <2>; 187 amlogic,channel-interrupts = 188 <10 11 12 13 14 15 16 17 18 19 20 21>; 189 }; 190 191 uart_a: serial@78000 { 192 compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart"; 193 reg = <0x0 0x78000 0x0 0x18>; 194 interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; 195 status = "disabled"; 196 }; 197 }; 198 199 }; 200}; 201