1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2024 Amlogic, Inc. All rights reserved. 4 */ 5 6#include "amlogic-a4-common.dtsi" 7#include "amlogic-a4-reset.h" 8#include <dt-bindings/power/amlogic,a4-pwrc.h> 9#include <dt-bindings/pinctrl/amlogic,pinctrl.h> 10/ { 11 cpus { 12 #address-cells = <2>; 13 #size-cells = <0>; 14 15 cpu0: cpu@0 { 16 device_type = "cpu"; 17 compatible = "arm,cortex-a53"; 18 reg = <0x0 0x0>; 19 enable-method = "psci"; 20 }; 21 22 cpu1: cpu@1 { 23 device_type = "cpu"; 24 compatible = "arm,cortex-a53"; 25 reg = <0x0 0x1>; 26 enable-method = "psci"; 27 }; 28 29 cpu2: cpu@2 { 30 device_type = "cpu"; 31 compatible = "arm,cortex-a53"; 32 reg = <0x0 0x2>; 33 enable-method = "psci"; 34 }; 35 36 cpu3: cpu@3 { 37 device_type = "cpu"; 38 compatible = "arm,cortex-a53"; 39 reg = <0x0 0x3>; 40 enable-method = "psci"; 41 }; 42 }; 43 44 sm: secure-monitor { 45 compatible = "amlogic,meson-gxbb-sm"; 46 47 pwrc: power-controller { 48 compatible = "amlogic,a4-pwrc"; 49 #power-domain-cells = <1>; 50 }; 51 }; 52}; 53 54&apb { 55 reset: reset-controller@2000 { 56 compatible = "amlogic,a4-reset", 57 "amlogic,meson-s4-reset"; 58 reg = <0x0 0x2000 0x0 0x98>; 59 #reset-cells = <1>; 60 }; 61 62 periphs_pinctrl: pinctrl@4000 { 63 compatible = "amlogic,pinctrl-a4"; 64 #address-cells = <2>; 65 #size-cells = <2>; 66 ranges = <0x0 0x0 0x0 0x4000 0x0 0x280>; 67 68 gpiox: gpio@100 { 69 reg = <0 0x100 0 0x40>, <0 0xc 0 0xc>; 70 reg-names = "gpio", "mux"; 71 gpio-controller; 72 #gpio-cells = <2>; 73 gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 18>; 74 }; 75 76 gpiot: gpio@140 { 77 reg = <0 0x140 0 0x40>, <0 0x2c 0 0xc>; 78 reg-names = "gpio", "mux"; 79 gpio-controller; 80 #gpio-cells = <2>; 81 gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_T<<8) 23>; 82 }; 83 84 gpiod: gpio@180 { 85 reg = <0 0x180 0 0x40>, <0 0x40 0 0x8>; 86 reg-names = "gpio", "mux"; 87 gpio-controller; 88 #gpio-cells = <2>; 89 gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 16>; 90 }; 91 92 gpioe: gpio@1c0 { 93 reg = <0 0x1c0 0 0x40>, <0 0x48 0 0x4>; 94 reg-names = "gpio", "mux"; 95 gpio-controller; 96 #gpio-cells = <2>; 97 gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>; 98 }; 99 100 gpiob: gpio@240 { 101 reg = <0 0x240 0 0x40>, <0 0 0 0x8>; 102 reg-names = "gpio", "mux"; 103 gpio-controller; 104 #gpio-cells = <2>; 105 gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>; 106 }; 107 108 func-uart-a { 109 uart_a_default: group-uart-a-pins1 { 110 pinmux = <AML_PINMUX(AMLOGIC_GPIO_X, 11, 1)>, 111 <AML_PINMUX(AMLOGIC_GPIO_X, 12, 1)>, 112 <AML_PINMUX(AMLOGIC_GPIO_X, 13, 1)>, 113 <AML_PINMUX(AMLOGIC_GPIO_X, 14, 1)>; 114 }; 115 116 group-uart-a-pins2 { 117 pinmux = <AML_PINMUX(AMLOGIC_GPIO_D, 2, 3)>, 118 <AML_PINMUX(AMLOGIC_GPIO_D, 3, 3)>; 119 bias-pull-up; 120 drive-strength-microamp = <4000>; 121 }; 122 }; 123 124 func-uart-b { 125 uart_b_default: group-uart-b-pins { 126 pinmux = <AML_PINMUX(AMLOGIC_GPIO_E, 0, 3)>, 127 <AML_PINMUX(AMLOGIC_GPIO_E, 1, 3)>; 128 bias-pull-up; 129 drive-strength-microamp = <4000>; 130 }; 131 }; 132 133 func-uart-d { 134 uart_d_default: group-uart-d-pins1 { 135 pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 18, 4)>, 136 <AML_PINMUX(AMLOGIC_GPIO_T, 19, 4)>; 137 bias-pull-up; 138 drive-strength-microamp = <4000>; 139 }; 140 141 group-uart-d-pins2 { 142 pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 7, 2)>, 143 <AML_PINMUX(AMLOGIC_GPIO_T, 8, 2)>, 144 <AML_PINMUX(AMLOGIC_GPIO_T, 9, 2)>, 145 <AML_PINMUX(AMLOGIC_GPIO_T, 10, 2)>; 146 bias-pull-up; 147 drive-strength-microamp = <4000>; 148 }; 149 }; 150 151 func-uart-e { 152 uart_e_default: group-uart-e-pins { 153 pinmux = <AML_PINMUX(AMLOGIC_GPIO_T, 14, 3)>, 154 <AML_PINMUX(AMLOGIC_GPIO_T, 15, 3)>, 155 <AML_PINMUX(AMLOGIC_GPIO_T, 16, 3)>, 156 <AML_PINMUX(AMLOGIC_GPIO_T, 17, 3)>; 157 bias-pull-up; 158 drive-strength-microamp = <4000>; 159 }; 160 }; 161 }; 162 163 gpio_intc: interrupt-controller@4080 { 164 compatible = "amlogic,a4-gpio-intc", 165 "amlogic,meson-gpio-intc"; 166 reg = <0x0 0x4080 0x0 0x20>; 167 interrupt-controller; 168 #interrupt-cells = <2>; 169 amlogic,channel-interrupts = 170 <10 11 12 13 14 15 16 17 18 19 20 21>; 171 }; 172 173 ao_pinctrl: pinctrl@8e700 { 174 compatible = "amlogic,pinctrl-a4"; 175 #address-cells = <2>; 176 #size-cells = <2>; 177 ranges = <0x0 0x0 0x0 0x8e700 0x0 0x80>; 178 179 gpioao: gpio@4 { 180 reg = <0 0x4 0 0x16>, <0 0 0 0x4>; 181 reg-names = "gpio", "mux"; 182 gpio-controller; 183 #gpio-cells = <2>; 184 gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_AO<<8) 7>; 185 }; 186 187 test_n: gpio@44 { 188 reg = <0 0x44 0 0x20>; 189 reg-names = "gpio"; 190 gpio-controller; 191 #gpio-cells = <2>; 192 gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>; 193 }; 194 }; 195 196 gpio_ao_intc: interrupt-controller@8e72c { 197 compatible = "amlogic,a4-gpio-ao-intc", 198 "amlogic,meson-gpio-intc"; 199 reg = <0x0 0x8e72c 0x0 0x0c>; 200 interrupt-controller; 201 #interrupt-cells = <2>; 202 amlogic,channel-interrupts = <140 141>; 203 }; 204}; 205