xref: /linux/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi (revision 6af91e3d2cfc8bb579b1aa2d22cd91f8c34acdf6)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
4 */
5
6#include <dt-bindings/interrupt-controller/irq.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/gpio/gpio.h>
9/ {
10	timer {
11		compatible = "arm,armv8-timer";
12		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
13			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
14			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
15			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
16	};
17
18	psci {
19		compatible = "arm,psci-1.0";
20		method = "smc";
21	};
22
23	xtal: xtal-clk {
24		compatible = "fixed-clock";
25		clock-frequency = <24000000>;
26		clock-output-names = "xtal";
27		#clock-cells = <0>;
28	};
29
30	soc {
31		compatible = "simple-bus";
32		#address-cells = <2>;
33		#size-cells = <2>;
34		ranges;
35
36		gic: interrupt-controller@fff01000 {
37			compatible = "arm,gic-400";
38			reg = <0x0 0xfff01000 0 0x1000>,
39			      <0x0 0xfff02000 0 0x2000>,
40			      <0x0 0xfff04000 0 0x2000>,
41			      <0x0 0xfff06000 0 0x2000>;
42			#interrupt-cells = <3>;
43			#address-cells = <0>;
44			interrupt-controller;
45			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
46		};
47
48		apb: bus@fe000000 {
49			compatible = "simple-bus";
50			reg = <0x0 0xfe000000 0x0 0x480000>;
51			#address-cells = <2>;
52			#size-cells = <2>;
53			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
54
55			uart_b: serial@7a000 {
56				compatible = "amlogic,a4-uart",
57					     "amlogic,meson-s4-uart";
58				reg = <0x0 0x7a000 0x0 0x18>;
59				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
60				clocks = <&xtal>, <&xtal>, <&xtal>;
61				clock-names = "xtal", "pclk", "baud";
62				status = "disabled";
63			};
64		};
65	};
66};
67