1*49449828SSuravee Suthikulpanit/* 2*49449828SSuravee Suthikulpanit * DTS file for AMD Seattle Overdrive Development Board 3*49449828SSuravee Suthikulpanit * Note: For Seattle Rev.B0 4*49449828SSuravee Suthikulpanit * 5*49449828SSuravee Suthikulpanit * Copyright (C) 2015 Advanced Micro Devices, Inc. 6*49449828SSuravee Suthikulpanit */ 7*49449828SSuravee Suthikulpanit 8*49449828SSuravee Suthikulpanit/dts-v1/; 9*49449828SSuravee Suthikulpanit 10*49449828SSuravee Suthikulpanit/include/ "amd-seattle-soc.dtsi" 11*49449828SSuravee Suthikulpanit 12*49449828SSuravee Suthikulpanit/ { 13*49449828SSuravee Suthikulpanit model = "AMD Seattle (Rev.B0) Development Board (Overdrive)"; 14*49449828SSuravee Suthikulpanit compatible = "amd,seattle-overdrive", "amd,seattle"; 15*49449828SSuravee Suthikulpanit 16*49449828SSuravee Suthikulpanit chosen { 17*49449828SSuravee Suthikulpanit stdout-path = &serial0; 18*49449828SSuravee Suthikulpanit }; 19*49449828SSuravee Suthikulpanit 20*49449828SSuravee Suthikulpanit psci { 21*49449828SSuravee Suthikulpanit compatible = "arm,psci-0.2"; 22*49449828SSuravee Suthikulpanit method = "smc"; 23*49449828SSuravee Suthikulpanit }; 24*49449828SSuravee Suthikulpanit}; 25*49449828SSuravee Suthikulpanit 26*49449828SSuravee Suthikulpanit&ccp0 { 27*49449828SSuravee Suthikulpanit status = "ok"; 28*49449828SSuravee Suthikulpanit amd,zlib-support = <1>; 29*49449828SSuravee Suthikulpanit}; 30*49449828SSuravee Suthikulpanit 31*49449828SSuravee Suthikulpanit/** 32*49449828SSuravee Suthikulpanit * NOTE: In Rev.B, gpio0 is reserved. 33*49449828SSuravee Suthikulpanit */ 34*49449828SSuravee Suthikulpanit&gpio1 { 35*49449828SSuravee Suthikulpanit status = "ok"; 36*49449828SSuravee Suthikulpanit}; 37*49449828SSuravee Suthikulpanit 38*49449828SSuravee Suthikulpanit&gpio2 { 39*49449828SSuravee Suthikulpanit status = "ok"; 40*49449828SSuravee Suthikulpanit}; 41*49449828SSuravee Suthikulpanit 42*49449828SSuravee Suthikulpanit&gpio3 { 43*49449828SSuravee Suthikulpanit status = "ok"; 44*49449828SSuravee Suthikulpanit}; 45*49449828SSuravee Suthikulpanit 46*49449828SSuravee Suthikulpanit&gpio4 { 47*49449828SSuravee Suthikulpanit status = "ok"; 48*49449828SSuravee Suthikulpanit}; 49*49449828SSuravee Suthikulpanit 50*49449828SSuravee Suthikulpanit&i2c0 { 51*49449828SSuravee Suthikulpanit status = "ok"; 52*49449828SSuravee Suthikulpanit}; 53*49449828SSuravee Suthikulpanit 54*49449828SSuravee Suthikulpanit&i2c1 { 55*49449828SSuravee Suthikulpanit status = "ok"; 56*49449828SSuravee Suthikulpanit}; 57*49449828SSuravee Suthikulpanit 58*49449828SSuravee Suthikulpanit&pcie0 { 59*49449828SSuravee Suthikulpanit status = "ok"; 60*49449828SSuravee Suthikulpanit}; 61*49449828SSuravee Suthikulpanit 62*49449828SSuravee Suthikulpanit&spi0 { 63*49449828SSuravee Suthikulpanit status = "ok"; 64*49449828SSuravee Suthikulpanit}; 65*49449828SSuravee Suthikulpanit 66*49449828SSuravee Suthikulpanit&spi1 { 67*49449828SSuravee Suthikulpanit status = "ok"; 68*49449828SSuravee Suthikulpanit sdcard0: sdcard@0 { 69*49449828SSuravee Suthikulpanit compatible = "mmc-spi-slot"; 70*49449828SSuravee Suthikulpanit reg = <0>; 71*49449828SSuravee Suthikulpanit spi-max-frequency = <20000000>; 72*49449828SSuravee Suthikulpanit voltage-ranges = <3200 3400>; 73*49449828SSuravee Suthikulpanit pl022,hierarchy = <0>; 74*49449828SSuravee Suthikulpanit pl022,interface = <0>; 75*49449828SSuravee Suthikulpanit pl022,com-mode = <0x0>; 76*49449828SSuravee Suthikulpanit pl022,rx-level-trig = <0>; 77*49449828SSuravee Suthikulpanit pl022,tx-level-trig = <0>; 78*49449828SSuravee Suthikulpanit }; 79*49449828SSuravee Suthikulpanit}; 80*49449828SSuravee Suthikulpanit 81*49449828SSuravee Suthikulpanit&ipmi_kcs { 82*49449828SSuravee Suthikulpanit status = "ok"; 83*49449828SSuravee Suthikulpanit}; 84*49449828SSuravee Suthikulpanit 85*49449828SSuravee Suthikulpanit&smb0 { 86*49449828SSuravee Suthikulpanit /include/ "amd-seattle-xgbe-b.dtsi" 87*49449828SSuravee Suthikulpanit}; 88