1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright Altera Corporation (C) 2015. All rights reserved. 4 */ 5 6#include "socfpga_stratix10.dtsi" 7 8/ { 9 model = "SoCFPGA Stratix 10 SoCDK"; 10 11 aliases { 12 serial0 = &uart0; 13 ethernet0 = &gmac0; 14 ethernet1 = &gmac1; 15 ethernet2 = &gmac2; 16 }; 17 18 chosen { 19 stdout-path = "serial0:115200n8"; 20 }; 21 22 leds { 23 compatible = "gpio-leds"; 24 hps0 { 25 label = "hps_led0"; 26 gpios = <&portb 20 GPIO_ACTIVE_HIGH>; 27 }; 28 29 hps1 { 30 label = "hps_led1"; 31 gpios = <&portb 19 GPIO_ACTIVE_HIGH>; 32 }; 33 34 hps2 { 35 label = "hps_led2"; 36 gpios = <&portb 21 GPIO_ACTIVE_HIGH>; 37 }; 38 }; 39 40 memory { 41 device_type = "memory"; 42 /* We expect the bootloader to fill in the reg */ 43 reg = <0 0 0 0>; 44 }; 45 46 ref_033v: 033-v-ref { 47 compatible = "regulator-fixed"; 48 regulator-name = "0.33V"; 49 regulator-min-microvolt = <330000>; 50 regulator-max-microvolt = <330000>; 51 }; 52 53 soc { 54 clocks { 55 osc1 { 56 clock-frequency = <25000000>; 57 }; 58 }; 59 60 eccmgr { 61 sdmmca-ecc@ff8c8c00 { 62 compatible = "altr,socfpga-s10-sdmmc-ecc", 63 "altr,socfpga-sdmmc-ecc"; 64 reg = <0xff8c8c00 0x100>; 65 altr,ecc-parent = <&mmc>; 66 interrupts = <14 4>, 67 <15 4>; 68 }; 69 }; 70 }; 71}; 72 73&gpio1 { 74 status = "okay"; 75}; 76 77&gmac0 { 78 status = "okay"; 79 phy-mode = "rgmii"; 80 phy-handle = <&phy0>; 81 82 max-frame-size = <9000>; 83 84 mdio0 { 85 #address-cells = <1>; 86 #size-cells = <0>; 87 compatible = "snps,dwmac-mdio"; 88 phy0: ethernet-phy@0 { 89 reg = <4>; 90 91 txd0-skew-ps = <0>; /* -420ps */ 92 txd1-skew-ps = <0>; /* -420ps */ 93 txd2-skew-ps = <0>; /* -420ps */ 94 txd3-skew-ps = <0>; /* -420ps */ 95 rxd0-skew-ps = <420>; /* 0ps */ 96 rxd1-skew-ps = <420>; /* 0ps */ 97 rxd2-skew-ps = <420>; /* 0ps */ 98 rxd3-skew-ps = <420>; /* 0ps */ 99 txen-skew-ps = <0>; /* -420ps */ 100 txc-skew-ps = <900>; /* 0ps */ 101 rxdv-skew-ps = <420>; /* 0ps */ 102 rxc-skew-ps = <1680>; /* 780ps */ 103 }; 104 }; 105}; 106 107&mmc { 108 status = "okay"; 109 cap-sd-highspeed; 110 cap-mmc-highspeed; 111 broken-cd; 112 bus-width = <4>; 113}; 114 115&uart0 { 116 status = "okay"; 117}; 118 119&usb0 { 120 status = "okay"; 121 disable-over-current; 122}; 123 124&watchdog0 { 125 status = "okay"; 126}; 127 128&i2c1 { 129 status = "okay"; 130 clock-frequency = <100000>; 131 i2c-sda-falling-time-ns = <890>; /* hcnt */ 132 i2c-sdl-falling-time-ns = <890>; /* lcnt */ 133 134 adc@14 { 135 compatible = "lltc,ltc2497"; 136 reg = <0x14>; 137 vref-supply = <&ref_033v>; 138 }; 139 140 temp@4c { 141 compatible = "maxim,max1619"; 142 reg = <0x4c>; 143 }; 144 145 eeprom@51 { 146 compatible = "atmel,24c32"; 147 reg = <0x51>; 148 pagesize = <32>; 149 }; 150 151 rtc@68 { 152 compatible = "dallas,ds1339"; 153 reg = <0x68>; 154 }; 155}; 156 157&qspi { 158 status = "okay"; 159 flash@0 { 160 #address-cells = <1>; 161 #size-cells = <1>; 162 compatible = "micron,mt25qu02g", "jedec,spi-nor"; 163 reg = <0>; 164 spi-max-frequency = <100000000>; 165 166 m25p,fast-read; 167 cdns,page-size = <256>; 168 cdns,block-size = <16>; 169 cdns,read-delay = <1>; 170 cdns,tshsl-ns = <50>; 171 cdns,tsd2d-ns = <50>; 172 cdns,tchsh-ns = <4>; 173 cdns,tslch-ns = <4>; 174 175 partitions { 176 compatible = "fixed-partitions"; 177 #address-cells = <1>; 178 #size-cells = <1>; 179 180 qspi_boot: partition@0 { 181 label = "Boot and fpga data"; 182 reg = <0x0 0x03FE0000>; 183 }; 184 185 qspi_rootfs: partition@3FE0000 { 186 label = "Root Filesystem - JFFS2"; 187 reg = <0x03FE0000 0x0C020000>; 188 }; 189 }; 190 }; 191}; 192