1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (C) 2023 Arm Ltd. 4 */ 5 6/dts-v1/; 7 8#include "sun50i-h616.dtsi" 9#include "sun50i-h616-cpu-opp.dtsi" 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/leds/common.h> 14 15/ { 16 model = "OrangePi Zero 2W"; 17 compatible = "xunlong,orangepi-zero2w", "allwinner,sun50i-h618"; 18 19 aliases { 20 serial0 = &uart0; 21 }; 22 23 chosen { 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 leds { 28 compatible = "gpio-leds"; 29 30 led-0 { 31 function = LED_FUNCTION_STATUS; 32 color = <LED_COLOR_ID_GREEN>; 33 gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ 34 }; 35 }; 36 37 reg_vcc5v: vcc5v { 38 /* board wide 5V supply directly from the USB-C socket */ 39 compatible = "regulator-fixed"; 40 regulator-name = "vcc-5v"; 41 regulator-min-microvolt = <5000000>; 42 regulator-max-microvolt = <5000000>; 43 regulator-always-on; 44 }; 45 46 reg_vcc3v3: vcc3v3 { 47 /* SY8089 DC/DC converter */ 48 compatible = "regulator-fixed"; 49 regulator-name = "vcc-3v3"; 50 regulator-min-microvolt = <3300000>; 51 regulator-max-microvolt = <3300000>; 52 vin-supply = <®_vcc5v>; 53 regulator-always-on; 54 }; 55}; 56 57&codec { 58 allwinner,audio-routing = "Line Out", "LINEOUT"; 59 status = "okay"; 60}; 61 62&cpu0 { 63 cpu-supply = <®_dcdc2>; 64}; 65 66&ehci1 { 67 status = "okay"; 68}; 69 70/* USB 2 & 3 are on the FPC connector (or the exansion board) */ 71 72&mmc0 { 73 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 74 bus-width = <4>; 75 vmmc-supply = <®_vcc3v3>; 76 status = "okay"; 77}; 78 79&ohci1 { 80 status = "okay"; 81}; 82 83&pio { 84 vcc-pc-supply = <®_dldo1>; 85 vcc-pf-supply = <®_dldo1>; /* internally via VCC-IO */ 86 vcc-pg-supply = <®_aldo1>; 87 vcc-ph-supply = <®_dldo1>; /* internally via VCC-IO */ 88 vcc-pi-supply = <®_dldo1>; 89}; 90 91&r_i2c { 92 status = "okay"; 93 94 axp313: pmic@36 { 95 compatible = "x-powers,axp313a"; 96 reg = <0x36>; 97 #interrupt-cells = <1>; 98 interrupt-controller; 99 interrupt-parent = <&pio>; 100 interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */ 101 102 vin1-supply = <®_vcc5v>; 103 vin2-supply = <®_vcc5v>; 104 vin3-supply = <®_vcc5v>; 105 106 regulators { 107 /* Supplies VCC-PLL and DRAM */ 108 reg_aldo1: aldo1 { 109 regulator-always-on; 110 regulator-min-microvolt = <1800000>; 111 regulator-max-microvolt = <1800000>; 112 regulator-name = "vcc1v8"; 113 }; 114 115 /* Supplies VCC-IO, so needs to be always on. */ 116 reg_dldo1: dldo1 { 117 regulator-always-on; 118 regulator-min-microvolt = <3300000>; 119 regulator-max-microvolt = <3300000>; 120 regulator-name = "vcc3v3"; 121 }; 122 123 reg_dcdc1: dcdc1 { 124 regulator-always-on; 125 regulator-min-microvolt = <810000>; 126 regulator-max-microvolt = <990000>; 127 regulator-name = "vdd-gpu-sys"; 128 }; 129 130 reg_dcdc2: dcdc2 { 131 regulator-always-on; 132 regulator-min-microvolt = <810000>; 133 regulator-max-microvolt = <1100000>; 134 regulator-name = "vdd-cpu"; 135 }; 136 137 reg_dcdc3: dcdc3 { 138 regulator-always-on; 139 regulator-min-microvolt = <1100000>; 140 regulator-max-microvolt = <1100000>; 141 regulator-name = "vdd-dram"; 142 }; 143 }; 144 }; 145}; 146 147&spi0 { 148 status = "okay"; 149 pinctrl-names = "default"; 150 pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; 151 152 flash@0 { 153 #address-cells = <1>; 154 #size-cells = <1>; 155 compatible = "jedec,spi-nor"; 156 reg = <0>; 157 spi-max-frequency = <40000000>; 158 }; 159}; 160 161&uart0 { 162 pinctrl-names = "default"; 163 pinctrl-0 = <&uart0_ph_pins>; 164 status = "okay"; 165}; 166 167&usbotg { 168 /* 169 * PHY0 pins are connected to a USB-C socket, but a role switch 170 * is not implemented: both CC pins are pulled to GND. 171 * The VBUS pins power the device, so a fixed peripheral mode 172 * is the best choice. 173 * The board can be powered via GPIOs, in this case port0 *can* 174 * act as a host (with a cable/adapter ignoring CC), as VBUS is 175 * then provided by the GPIOs. Any user of this setup would 176 * need to adjust the DT accordingly: dr_mode set to "host", 177 * enabling OHCI0 and EHCI0. 178 */ 179 dr_mode = "peripheral"; 180 status = "okay"; 181}; 182 183&usbphy { 184 usb1_vbus-supply = <®_vcc5v>; 185 status = "okay"; 186}; 187