1*116745ddSClément Péron// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*116745ddSClément Péron// Copyright (C) 2022 Clément Péron <peron.clem@gmail.com> 3*116745ddSClément Péron 4*116745ddSClément Péron/ { 5*116745ddSClément Péron gpu_opp_table: opp-table-gpu { 6*116745ddSClément Péron compatible = "operating-points-v2"; 7*116745ddSClément Péron 8*116745ddSClément Péron opp-216000000 { 9*116745ddSClément Péron opp-hz = /bits/ 64 <216000000>; 10*116745ddSClément Péron opp-microvolt = <810000 810000 1200000>; 11*116745ddSClément Péron }; 12*116745ddSClément Péron 13*116745ddSClément Péron opp-264000000 { 14*116745ddSClément Péron opp-hz = /bits/ 64 <264000000>; 15*116745ddSClément Péron opp-microvolt = <810000 810000 1200000>; 16*116745ddSClément Péron }; 17*116745ddSClément Péron 18*116745ddSClément Péron opp-312000000 { 19*116745ddSClément Péron opp-hz = /bits/ 64 <312000000>; 20*116745ddSClément Péron opp-microvolt = <810000 810000 1200000>; 21*116745ddSClément Péron }; 22*116745ddSClément Péron 23*116745ddSClément Péron opp-336000000 { 24*116745ddSClément Péron opp-hz = /bits/ 64 <336000000>; 25*116745ddSClément Péron opp-microvolt = <810000 810000 1200000>; 26*116745ddSClément Péron }; 27*116745ddSClément Péron 28*116745ddSClément Péron opp-360000000 { 29*116745ddSClément Péron opp-hz = /bits/ 64 <360000000>; 30*116745ddSClément Péron opp-microvolt = <820000 820000 1200000>; 31*116745ddSClément Péron }; 32*116745ddSClément Péron 33*116745ddSClément Péron opp-384000000 { 34*116745ddSClément Péron opp-hz = /bits/ 64 <384000000>; 35*116745ddSClément Péron opp-microvolt = <830000 830000 1200000>; 36*116745ddSClément Péron }; 37*116745ddSClément Péron 38*116745ddSClément Péron opp-408000000 { 39*116745ddSClément Péron opp-hz = /bits/ 64 <408000000>; 40*116745ddSClément Péron opp-microvolt = <840000 840000 1200000>; 41*116745ddSClément Péron }; 42*116745ddSClément Péron 43*116745ddSClément Péron opp-420000000 { 44*116745ddSClément Péron opp-hz = /bits/ 64 <420000000>; 45*116745ddSClément Péron opp-microvolt = <850000 850000 1200000>; 46*116745ddSClément Péron }; 47*116745ddSClément Péron 48*116745ddSClément Péron opp-432000000 { 49*116745ddSClément Péron opp-hz = /bits/ 64 <432000000>; 50*116745ddSClément Péron opp-microvolt = <860000 860000 1200000>; 51*116745ddSClément Péron }; 52*116745ddSClément Péron 53*116745ddSClément Péron opp-456000000 { 54*116745ddSClément Péron opp-hz = /bits/ 64 <456000000>; 55*116745ddSClément Péron opp-microvolt = <870000 870000 1200000>; 56*116745ddSClément Péron }; 57*116745ddSClément Péron 58*116745ddSClément Péron opp-504000000 { 59*116745ddSClément Péron opp-hz = /bits/ 64 <504000000>; 60*116745ddSClément Péron opp-microvolt = <890000 890000 1200000>; 61*116745ddSClément Péron }; 62*116745ddSClément Péron 63*116745ddSClément Péron opp-540000000 { 64*116745ddSClément Péron opp-hz = /bits/ 64 <540000000>; 65*116745ddSClément Péron opp-microvolt = <910000 910000 1200000>; 66*116745ddSClément Péron }; 67*116745ddSClément Péron 68*116745ddSClément Péron opp-576000000 { 69*116745ddSClément Péron opp-hz = /bits/ 64 <576000000>; 70*116745ddSClément Péron opp-microvolt = <930000 930000 1200000>; 71*116745ddSClément Péron }; 72*116745ddSClément Péron 73*116745ddSClément Péron opp-624000000 { 74*116745ddSClément Péron opp-hz = /bits/ 64 <624000000>; 75*116745ddSClément Péron opp-microvolt = <950000 950000 1200000>; 76*116745ddSClément Péron }; 77*116745ddSClément Péron 78*116745ddSClément Péron opp-756000000 { 79*116745ddSClément Péron opp-hz = /bits/ 64 <756000000>; 80*116745ddSClément Péron opp-microvolt = <1040000 1040000 1200000>; 81*116745ddSClément Péron }; 82*116745ddSClément Péron }; 83*116745ddSClément Péron}; 84*116745ddSClément Péron 85*116745ddSClément Péron&gpu { 86*116745ddSClément Péron operating-points-v2 = <&gpu_opp_table>; 87*116745ddSClément Péron}; 88