100f7980aSJagan Teki// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 200f7980aSJagan Teki/* 300f7980aSJagan Teki * Copyright (C) 2019 Oceanic Systems (UK) Ltd. 400f7980aSJagan Teki * Copyright (C) 2019 Amarula Solutions B.V. 500f7980aSJagan Teki * Author: Jagan Teki <jagan@amarulasolutions.com> 600f7980aSJagan Teki */ 700f7980aSJagan Teki 800f7980aSJagan Teki/dts-v1/; 900f7980aSJagan Teki 1000f7980aSJagan Teki#include "sun50i-a64-sopine.dtsi" 1100f7980aSJagan Teki 1200f7980aSJagan Teki/ { 1300f7980aSJagan Teki model = "Oceanic 5205 5inMFD"; 1400f7980aSJagan Teki compatible = "oceanic,5205-5inmfd", "allwinner,sun50i-a64"; 1500f7980aSJagan Teki 1600f7980aSJagan Teki aliases { 1700f7980aSJagan Teki ethernet0 = &emac; 1800f7980aSJagan Teki serial0 = &uart0; 1900f7980aSJagan Teki }; 2000f7980aSJagan Teki 2100f7980aSJagan Teki chosen { 2200f7980aSJagan Teki stdout-path = "serial0:115200n8"; 2300f7980aSJagan Teki }; 2400f7980aSJagan Teki}; 2500f7980aSJagan Teki 2600f7980aSJagan Teki&ehci0 { 2700f7980aSJagan Teki status = "okay"; 2800f7980aSJagan Teki}; 2900f7980aSJagan Teki 3000f7980aSJagan Teki&emac { 3100f7980aSJagan Teki pinctrl-names = "default"; 3200f7980aSJagan Teki pinctrl-0 = <&rgmii_pins>; 3300f7980aSJagan Teki phy-mode = "rgmii"; 3400f7980aSJagan Teki phy-handle = <&ext_rgmii_phy>; 3500f7980aSJagan Teki phy-supply = <®_dc1sw>; 3600f7980aSJagan Teki allwinner,tx-delay-ps = <600>; 3700f7980aSJagan Teki status = "okay"; 3800f7980aSJagan Teki}; 3900f7980aSJagan Teki 40*3c2a22b8SJagan Teki&i2c0 { 41*3c2a22b8SJagan Teki status = "okay"; 42*3c2a22b8SJagan Teki 43*3c2a22b8SJagan Teki touchscreen@5d { 44*3c2a22b8SJagan Teki compatible = "goodix,gt911"; 45*3c2a22b8SJagan Teki reg = <0x5d>; 46*3c2a22b8SJagan Teki AVDD28-supply = <®_ldo_io0>; /* VDD_CTP: GPIO0-LDO */ 47*3c2a22b8SJagan Teki interrupt-parent = <&pio>; 48*3c2a22b8SJagan Teki interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>; 49*3c2a22b8SJagan Teki irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */ 50*3c2a22b8SJagan Teki reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH11 */ 51*3c2a22b8SJagan Teki touchscreen-inverted-x; 52*3c2a22b8SJagan Teki touchscreen-inverted-y; 53*3c2a22b8SJagan Teki }; 54*3c2a22b8SJagan Teki}; 55*3c2a22b8SJagan Teki 5600f7980aSJagan Teki&mdio { 5700f7980aSJagan Teki ext_rgmii_phy: ethernet-phy@1 { 5800f7980aSJagan Teki compatible = "ethernet-phy-ieee802.3-c22"; 5900f7980aSJagan Teki reg = <1>; 6000f7980aSJagan Teki }; 6100f7980aSJagan Teki}; 6200f7980aSJagan Teki 6300f7980aSJagan Teki&ohci0 { 6400f7980aSJagan Teki status = "okay"; 6500f7980aSJagan Teki}; 6600f7980aSJagan Teki 6700f7980aSJagan Teki®_dc1sw { 6800f7980aSJagan Teki regulator-name = "vcc-phy"; 6900f7980aSJagan Teki}; 7000f7980aSJagan Teki 71*3c2a22b8SJagan Teki®_ldo_io0 { 72*3c2a22b8SJagan Teki regulator-min-microvolt = <2800000>; 73*3c2a22b8SJagan Teki regulator-max-microvolt = <2800000>; 74*3c2a22b8SJagan Teki regulator-name = "vdd-ctp"; 75*3c2a22b8SJagan Teki status = "okay"; 76*3c2a22b8SJagan Teki}; 77*3c2a22b8SJagan Teki 7800f7980aSJagan Teki&uart0 { 7900f7980aSJagan Teki pinctrl-names = "default"; 8000f7980aSJagan Teki pinctrl-0 = <&uart0_pb_pins>; 8100f7980aSJagan Teki status = "okay"; 8200f7980aSJagan Teki}; 8300f7980aSJagan Teki 8400f7980aSJagan Teki&usb_otg { 8500f7980aSJagan Teki dr_mode = "host"; 8600f7980aSJagan Teki status = "okay"; 8700f7980aSJagan Teki}; 8800f7980aSJagan Teki 8900f7980aSJagan Teki&usbphy { 9000f7980aSJagan Teki status = "okay"; 9100f7980aSJagan Teki}; 92