xref: /linux/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts (revision 8dd06ef34b6e2f41b29fbf5fc1663780f2524285)
100f7980aSJagan Teki// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*cabbaed7SClément Péron// Copyright (C) 2019 Oceanic Systems (UK) Ltd.
3*cabbaed7SClément Péron// Copyright (C) 2019 Amarula Solutions B.V.
4*cabbaed7SClément Péron// Author: Jagan Teki <jagan@amarulasolutions.com>
500f7980aSJagan Teki
600f7980aSJagan Teki/dts-v1/;
700f7980aSJagan Teki
800f7980aSJagan Teki#include "sun50i-a64-sopine.dtsi"
900f7980aSJagan Teki
1000f7980aSJagan Teki/ {
1100f7980aSJagan Teki	model = "Oceanic 5205 5inMFD";
1200f7980aSJagan Teki	compatible = "oceanic,5205-5inmfd", "allwinner,sun50i-a64";
1300f7980aSJagan Teki
1400f7980aSJagan Teki	aliases {
1500f7980aSJagan Teki		ethernet0 = &emac;
1600f7980aSJagan Teki		serial0 = &uart0;
1700f7980aSJagan Teki	};
1800f7980aSJagan Teki
1900f7980aSJagan Teki	chosen {
2000f7980aSJagan Teki		stdout-path = "serial0:115200n8";
2100f7980aSJagan Teki	};
2200f7980aSJagan Teki};
2300f7980aSJagan Teki
2400f7980aSJagan Teki&ehci0 {
2500f7980aSJagan Teki	status = "okay";
2600f7980aSJagan Teki};
2700f7980aSJagan Teki
2800f7980aSJagan Teki&emac {
2900f7980aSJagan Teki	pinctrl-names = "default";
3000f7980aSJagan Teki	pinctrl-0 = <&rgmii_pins>;
3100f7980aSJagan Teki	phy-mode = "rgmii";
3200f7980aSJagan Teki	phy-handle = <&ext_rgmii_phy>;
3300f7980aSJagan Teki	phy-supply = <&reg_dc1sw>;
3400f7980aSJagan Teki	allwinner,tx-delay-ps = <600>;
3500f7980aSJagan Teki	status = "okay";
3600f7980aSJagan Teki};
3700f7980aSJagan Teki
383c2a22b8SJagan Teki&i2c0 {
393c2a22b8SJagan Teki	status = "okay";
403c2a22b8SJagan Teki
413c2a22b8SJagan Teki	touchscreen@5d {
423c2a22b8SJagan Teki		compatible = "goodix,gt911";
433c2a22b8SJagan Teki		reg = <0x5d>;
443c2a22b8SJagan Teki		AVDD28-supply = <&reg_ldo_io0>;			/* VDD_CTP: GPIO0-LDO */
453c2a22b8SJagan Teki		interrupt-parent = <&pio>;
463c2a22b8SJagan Teki		interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>;
473c2a22b8SJagan Teki		irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>;	/* CTP-INT: PH4 */
483c2a22b8SJagan Teki		reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>;	/* CTP-RST: PH11 */
493c2a22b8SJagan Teki		touchscreen-inverted-x;
503c2a22b8SJagan Teki		touchscreen-inverted-y;
513c2a22b8SJagan Teki	};
523c2a22b8SJagan Teki};
533c2a22b8SJagan Teki
5400f7980aSJagan Teki&mdio {
5500f7980aSJagan Teki	ext_rgmii_phy: ethernet-phy@1 {
5600f7980aSJagan Teki		compatible = "ethernet-phy-ieee802.3-c22";
5700f7980aSJagan Teki		reg = <1>;
5800f7980aSJagan Teki	};
5900f7980aSJagan Teki};
6000f7980aSJagan Teki
6100f7980aSJagan Teki&ohci0 {
6200f7980aSJagan Teki	status = "okay";
6300f7980aSJagan Teki};
6400f7980aSJagan Teki
6500f7980aSJagan Teki&reg_dc1sw {
6600f7980aSJagan Teki	regulator-name = "vcc-phy";
6700f7980aSJagan Teki};
6800f7980aSJagan Teki
693c2a22b8SJagan Teki&reg_ldo_io0 {
703c2a22b8SJagan Teki	regulator-min-microvolt = <2800000>;
713c2a22b8SJagan Teki	regulator-max-microvolt = <2800000>;
723c2a22b8SJagan Teki	regulator-name = "vdd-ctp";
733c2a22b8SJagan Teki	status = "okay";
743c2a22b8SJagan Teki};
753c2a22b8SJagan Teki
7600f7980aSJagan Teki&uart0 {
7700f7980aSJagan Teki	pinctrl-names = "default";
7800f7980aSJagan Teki	pinctrl-0 = <&uart0_pb_pins>;
7900f7980aSJagan Teki	status = "okay";
8000f7980aSJagan Teki};
8100f7980aSJagan Teki
8200f7980aSJagan Teki&usb_otg {
8300f7980aSJagan Teki	dr_mode = "host";
8400f7980aSJagan Teki	status = "okay";
8500f7980aSJagan Teki};
8600f7980aSJagan Teki
8700f7980aSJagan Teki&usbphy {
8800f7980aSJagan Teki	status = "okay";
8900f7980aSJagan Teki};
90