xref: /linux/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts (revision fd7d598270724cc787982ea48bbe17ad383a8b7f) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (c) 2016 ARM Ltd.
3
4/dts-v1/;
5
6#include "sun50i-a64.dtsi"
7#include "sun50i-a64-cpu-opp.dtsi"
8
9#include <dt-bindings/gpio/gpio.h>
10
11/ {
12	model = "BananaPi-M64";
13	compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
14
15	aliases {
16		ethernet0 = &emac;
17		serial0 = &uart0;
18		serial1 = &uart1;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	hdmi-connector {
26		compatible = "hdmi-connector";
27		type = "a";
28
29		port {
30			hdmi_con_in: endpoint {
31				remote-endpoint = <&hdmi_out_con>;
32			};
33		};
34	};
35
36	leds {
37		compatible = "gpio-leds";
38
39		led-0 {
40			label = "bananapi-m64:red:pwr";
41			gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
42			default-state = "on";
43		};
44
45		led-1 {
46			label = "bananapi-m64:green:user";
47			gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */
48		};
49
50		led-2 {
51			label = "bananapi-m64:blue:user";
52			gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
53		};
54	};
55
56	wifi_pwrseq: wifi_pwrseq {
57		compatible = "mmc-pwrseq-simple";
58		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
59		clocks = <&rtc CLK_OSC32K_FANOUT>;
60		clock-names = "ext_clock";
61	};
62};
63
64&codec {
65	status = "okay";
66};
67
68&codec_analog {
69	cpvdd-supply = <&reg_eldo1>;
70	status = "okay";
71};
72
73&cpu0 {
74	cpu-supply = <&reg_dcdc2>;
75};
76
77&cpu1 {
78	cpu-supply = <&reg_dcdc2>;
79};
80
81&cpu2 {
82	cpu-supply = <&reg_dcdc2>;
83};
84
85&cpu3 {
86	cpu-supply = <&reg_dcdc2>;
87};
88
89&dai {
90	status = "okay";
91};
92
93&de {
94	status = "okay";
95};
96
97&ehci0 {
98	status = "okay";
99};
100
101&ehci1 {
102	status = "okay";
103};
104
105&emac {
106	pinctrl-names = "default";
107	pinctrl-0 = <&rgmii_pins>;
108	phy-mode = "rgmii-id";
109	phy-handle = <&ext_rgmii_phy>;
110	phy-supply = <&reg_dc1sw>;
111	status = "okay";
112};
113
114&hdmi {
115	hvcc-supply = <&reg_dldo1>;
116	status = "okay";
117};
118
119&hdmi_out {
120	hdmi_out_con: endpoint {
121		remote-endpoint = <&hdmi_con_in>;
122	};
123};
124
125&i2c1 {
126	status = "okay";
127};
128
129&i2c1_pins {
130	bias-pull-up;
131};
132
133&mdio {
134	ext_rgmii_phy: ethernet-phy@1 {
135		compatible = "ethernet-phy-ieee802.3-c22";
136		reg = <1>;
137	};
138};
139
140&mmc0 {
141	pinctrl-names = "default";
142	pinctrl-0 = <&mmc0_pins>;
143	vmmc-supply = <&reg_dcdc1>;
144	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
145	disable-wp;
146	bus-width = <4>;
147	status = "okay";
148};
149
150&mmc1 {
151	pinctrl-names = "default";
152	pinctrl-0 = <&mmc1_pins>;
153	vmmc-supply = <&reg_dldo2>;
154	vqmmc-supply = <&reg_dldo4>;
155	mmc-pwrseq = <&wifi_pwrseq>;
156	bus-width = <4>;
157	non-removable;
158	status = "okay";
159
160	brcmf: wifi@1 {
161		reg = <1>;
162		compatible = "brcm,bcm4329-fmac";
163		interrupt-parent = <&r_pio>;
164		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
165		interrupt-names = "host-wake";
166	};
167};
168
169&mmc2 {
170	pinctrl-names = "default";
171	pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
172	vmmc-supply = <&reg_dcdc1>;
173	bus-width = <8>;
174	non-removable;
175	cap-mmc-hw-reset;
176	status = "okay";
177};
178
179&ohci0 {
180	status = "okay";
181};
182
183&ohci1 {
184	status = "okay";
185};
186
187&r_rsb {
188	status = "okay";
189
190	axp803: pmic@3a3 {
191		compatible = "x-powers,axp803";
192		reg = <0x3a3>;
193		interrupt-parent = <&r_intc>;
194		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
195		x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
196	};
197};
198
199#include "axp803.dtsi"
200
201&ac_power_supply {
202	status = "okay";
203};
204
205&battery_power_supply {
206	status = "okay";
207};
208
209&reg_aldo1 {
210	/*
211	 * This regulator also drives the PE pingroup GPIOs,
212	 * which also controls two LEDs.
213	 */
214	regulator-always-on;
215	regulator-min-microvolt = <2800000>;
216	regulator-max-microvolt = <2800000>;
217	regulator-name = "afvcc-csi";
218};
219
220&reg_aldo2 {
221	regulator-always-on;
222	regulator-min-microvolt = <1800000>;
223	regulator-max-microvolt = <3300000>;
224	regulator-name = "vcc-pl";
225};
226
227&reg_aldo3 {
228	regulator-always-on;
229	regulator-min-microvolt = <3000000>;
230	regulator-max-microvolt = <3000000>;
231	regulator-name = "vcc-pll-avcc";
232};
233
234&reg_dc1sw {
235	/*
236	 * This regulator also indirectly drives the PD pingroup GPIOs,
237	 * which also controls the power LED.
238	 */
239	regulator-always-on;
240	regulator-name = "vcc-phy";
241};
242
243&reg_dcdc1 {
244	regulator-always-on;
245	regulator-min-microvolt = <3300000>;
246	regulator-max-microvolt = <3300000>;
247	regulator-name = "vcc-3v3";
248};
249
250&reg_dcdc2 {
251	regulator-always-on;
252	regulator-min-microvolt = <1040000>;
253	regulator-max-microvolt = <1300000>;
254	regulator-name = "vdd-cpux";
255};
256
257/* DCDC3 is polyphased with DCDC2 */
258
259&reg_dcdc5 {
260	regulator-always-on;
261	regulator-min-microvolt = <1500000>;
262	regulator-max-microvolt = <1500000>;
263	regulator-name = "vcc-dram";
264};
265
266&reg_dcdc6 {
267	regulator-always-on;
268	regulator-min-microvolt = <1100000>;
269	regulator-max-microvolt = <1100000>;
270	regulator-name = "vdd-sys";
271};
272
273&reg_dldo1 {
274	regulator-min-microvolt = <3300000>;
275	regulator-max-microvolt = <3300000>;
276	regulator-name = "vcc-hdmi-dsi";
277};
278
279&reg_dldo2 {
280	regulator-min-microvolt = <3300000>;
281	regulator-max-microvolt = <3300000>;
282	regulator-name = "vcc-wifi";
283};
284
285&reg_dldo4 {
286	regulator-min-microvolt = <1800000>;
287	regulator-max-microvolt = <3300000>;
288	regulator-name = "vcc-wifi-io";
289};
290
291&reg_drivevbus {
292	regulator-name = "usb0-vbus";
293	status = "okay";
294};
295
296&reg_eldo1 {
297	regulator-min-microvolt = <1800000>;
298	regulator-max-microvolt = <1800000>;
299	regulator-name = "cpvdd";
300};
301
302&reg_fldo1 {
303	regulator-min-microvolt = <1200000>;
304	regulator-max-microvolt = <1200000>;
305	regulator-name = "vcc-1v2-hsic";
306};
307
308/*
309 * The A64 chip cannot work without this regulator off, although
310 * it seems to be only driving the AR100 core.
311 * Maybe we don't still know well about CPUs domain.
312 */
313&reg_fldo2 {
314	regulator-always-on;
315	regulator-min-microvolt = <1100000>;
316	regulator-max-microvolt = <1100000>;
317	regulator-name = "vdd-cpus";
318};
319
320&reg_rtc_ldo {
321	regulator-name = "vcc-rtc";
322};
323
324&simplefb_hdmi {
325	vcc-hdmi-supply = <&reg_dldo1>;
326};
327
328&sound {
329	status = "okay";
330	simple-audio-card,widgets = "Headphone", "Headphone Jack",
331				    "Microphone", "Microphone Jack",
332				    "Microphone", "Onboard Microphone";
333	simple-audio-card,routing =
334			"Left DAC", "DACL",
335			"Right DAC", "DACR",
336			"ADCL", "Left ADC",
337			"ADCR", "Right ADC",
338			"Headphone Jack", "HP",
339			"MIC2", "Microphone Jack",
340			"Onboard Microphone", "MBIAS",
341			"MIC1", "Onboard Microphone";
342};
343
344&uart0 {
345	pinctrl-names = "default";
346	pinctrl-0 = <&uart0_pb_pins>;
347	status = "okay";
348};
349
350&uart1 {
351	pinctrl-names = "default";
352	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
353	uart-has-rtscts;
354	status = "okay";
355
356	bluetooth {
357		compatible = "brcm,bcm43438-bt";
358		clocks = <&rtc CLK_OSC32K_FANOUT>;
359		clock-names = "lpo";
360		vbat-supply = <&reg_dldo2>;
361		vddio-supply = <&reg_dldo4>;
362		device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
363		host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
364		shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
365	};
366};
367
368&usb_otg {
369	dr_mode = "otg";
370	status = "okay";
371};
372
373&usb_power_supply {
374	status = "okay";
375};
376
377&usbphy {
378	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
379	usb0_vbus_power-supply = <&usb_power_supply>;
380	usb0_vbus-supply = <&reg_drivevbus>;
381	status = "okay";
382};
383