xref: /linux/arch/arm/plat-orion/include/plat/pcie.h (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1 /*
2  * arch/arm/plat-orion/include/plat/pcie.h
3  *
4  * Marvell Orion SoC PCIe handling.
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10 
11 #ifndef __PLAT_PCIE_H
12 #define __PLAT_PCIE_H
13 
14 struct pci_bus;
15 
16 u32 orion_pcie_dev_id(void __iomem *base);
17 u32 orion_pcie_rev(void __iomem *base);
18 int orion_pcie_link_up(void __iomem *base);
19 int orion_pcie_x4_mode(void __iomem *base);
20 int orion_pcie_get_local_bus_nr(void __iomem *base);
21 void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
22 void orion_pcie_reset(void __iomem *base);
23 void orion_pcie_setup(void __iomem *base);
24 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
25 		       u32 devfn, int where, int size, u32 *val);
26 int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
27 			   u32 devfn, int where, int size, u32 *val);
28 int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus,
29 			  u32 devfn, int where, int size, u32 *val);
30 int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus,
31 		       u32 devfn, int where, int size, u32 val);
32 
33 
34 #endif
35