1d2912cb1SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 21da177e4SLinus Torvalds/* 31da177e4SLinus Torvalds * linux/arch/arm/mm/tlbv4wb.S 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * Copyright (C) 1997-2002 Russell King 61da177e4SLinus Torvalds * 71da177e4SLinus Torvalds * ARM architecture version 4 TLB handling functions. 81da177e4SLinus Torvalds * These assume a split I/D TLBs w/o I TLB entry, with a write buffer. 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds * Processors: SA110 SA1100 SA1110 111da177e4SLinus Torvalds */ 121da177e4SLinus Torvalds#include <linux/linkage.h> 131da177e4SLinus Torvalds#include <linux/init.h> 14*6b0ef279SArd Biesheuvel#include <linux/cfi_types.h> 156ebbf2ceSRussell King#include <asm/assembler.h> 16e6ae744dSSam Ravnborg#include <asm/asm-offsets.h> 171da177e4SLinus Torvalds#include <asm/tlbflush.h> 181da177e4SLinus Torvalds#include "proc-macros.S" 191da177e4SLinus Torvalds 201da177e4SLinus Torvalds .align 5 211da177e4SLinus Torvalds/* 221da177e4SLinus Torvalds * v4wb_flush_user_tlb_range(start, end, mm) 231da177e4SLinus Torvalds * 241da177e4SLinus Torvalds * Invalidate a range of TLB entries in the specified address space. 251da177e4SLinus Torvalds * 261da177e4SLinus Torvalds * - start - range start address 271da177e4SLinus Torvalds * - end - range end address 281da177e4SLinus Torvalds * - mm - mm_struct describing address space 291da177e4SLinus Torvalds */ 301da177e4SLinus Torvalds .align 5 31*6b0ef279SArd BiesheuvelSYM_TYPED_FUNC_START(v4wb_flush_user_tlb_range) 321da177e4SLinus Torvalds vma_vm_mm ip, r2 331da177e4SLinus Torvalds act_mm r3 @ get current->active_mm 341da177e4SLinus Torvalds eors r3, ip, r3 @ == mm ? 356ebbf2ceSRussell King retne lr @ no, we dont do anything 361da177e4SLinus Torvalds vma_vm_flags r2, r2 371da177e4SLinus Torvalds mcr p15, 0, r3, c7, c10, 4 @ drain WB 381da177e4SLinus Torvalds tst r2, #VM_EXEC 391da177e4SLinus Torvalds mcrne p15, 0, r3, c8, c5, 0 @ invalidate I TLB 401da177e4SLinus Torvalds bic r0, r0, #0x0ff 411da177e4SLinus Torvalds bic r0, r0, #0xf00 421da177e4SLinus Torvalds1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry 431da177e4SLinus Torvalds add r0, r0, #PAGE_SZ 441da177e4SLinus Torvalds cmp r0, r1 451da177e4SLinus Torvalds blo 1b 466ebbf2ceSRussell King ret lr 47*6b0ef279SArd BiesheuvelSYM_FUNC_END(v4wb_flush_user_tlb_range) 481da177e4SLinus Torvalds 491da177e4SLinus Torvalds/* 501da177e4SLinus Torvalds * v4_flush_kern_tlb_range(start, end) 511da177e4SLinus Torvalds * 521da177e4SLinus Torvalds * Invalidate a range of TLB entries in the specified kernel 531da177e4SLinus Torvalds * address range. 541da177e4SLinus Torvalds * 551da177e4SLinus Torvalds * - start - virtual address (may not be aligned) 561da177e4SLinus Torvalds * - end - virtual address (may not be aligned) 571da177e4SLinus Torvalds */ 58*6b0ef279SArd BiesheuvelSYM_TYPED_FUNC_START(v4wb_flush_kern_tlb_range) 591da177e4SLinus Torvalds mov r3, #0 601da177e4SLinus Torvalds mcr p15, 0, r3, c7, c10, 4 @ drain WB 611da177e4SLinus Torvalds bic r0, r0, #0x0ff 621da177e4SLinus Torvalds bic r0, r0, #0xf00 631da177e4SLinus Torvalds mcr p15, 0, r3, c8, c5, 0 @ invalidate I TLB 641da177e4SLinus Torvalds1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry 651da177e4SLinus Torvalds add r0, r0, #PAGE_SZ 661da177e4SLinus Torvalds cmp r0, r1 671da177e4SLinus Torvalds blo 1b 686ebbf2ceSRussell King ret lr 69*6b0ef279SArd BiesheuvelSYM_FUNC_END(v4wb_flush_kern_tlb_range) 70