xref: /linux/arch/arm/mm/tlb-fa.S (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *  linux/arch/arm/mm/tlb-fa.S
4 *
5 *  Copyright (C) 2005 Faraday Corp.
6 *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
7 *
8 * Based on tlb-v4wbi.S:
9 *  Copyright (C) 1997-2002 Russell King
10 *
11 *  ARM architecture version 4, Faraday variation.
12 *  This assume an unified TLBs, with a write buffer, and branch target buffer (BTB)
13 *
14 *  Processors: FA520 FA526 FA626
15 */
16#include <linux/linkage.h>
17#include <linux/init.h>
18#include <linux/cfi_types.h>
19#include <asm/assembler.h>
20#include <asm/asm-offsets.h>
21#include <asm/tlbflush.h>
22#include "proc-macros.S"
23
24
25/*
26 *	flush_user_tlb_range(start, end, mm)
27 *
28 *	Invalidate a range of TLB entries in the specified address space.
29 *
30 *	- start - range start address
31 *	- end   - range end address
32 *	- mm    - mm_struct describing address space
33 */
34	.align	4
35SYM_TYPED_FUNC_START(fa_flush_user_tlb_range)
36	vma_vm_mm ip, r2
37	act_mm	r3				@ get current->active_mm
38	eors	r3, ip, r3			@ == mm ?
39	retne	lr				@ no, we dont do anything
40	mov	r3, #0
41	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
42	bic	r0, r0, #0x0ff
43	bic	r0, r0, #0xf00
441:	mcr	p15, 0, r0, c8, c7, 1		@ invalidate UTLB entry
45	add	r0, r0, #PAGE_SZ
46	cmp	r0, r1
47	blo	1b
48	mcr	p15, 0, r3, c7, c10, 4		@ data write barrier
49	ret	lr
50SYM_FUNC_END(fa_flush_user_tlb_range)
51
52
53SYM_TYPED_FUNC_START(fa_flush_kern_tlb_range)
54	mov	r3, #0
55	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
56	bic	r0, r0, #0x0ff
57	bic	r0, r0, #0xf00
581:	mcr	p15, 0, r0, c8, c7, 1		@ invalidate UTLB entry
59	add	r0, r0, #PAGE_SZ
60	cmp	r0, r1
61	blo	1b
62	mcr	p15, 0, r3, c7, c10, 4		@ data write barrier
63	mcr	p15, 0, r3, c7, c5, 4		@ prefetch flush (isb)
64	ret	lr
65SYM_FUNC_END(fa_flush_kern_tlb_range)
66