xref: /linux/arch/arm/mm/proc-arm740.S (revision 58b3bafff8257c6946df5d6aeb215b8ac839ed2a)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *  linux/arch/arm/mm/arm740.S: utility functions for ARM740
4 *
5 *  Copyright (C) 2004-2006 Hyok S. Choi (hyok.choi@samsung.com)
6 */
7#include <linux/linkage.h>
8#include <linux/init.h>
9#include <asm/assembler.h>
10#include <asm/asm-offsets.h>
11#include <asm/hwcap.h>
12#include <asm/pgtable-hwdef.h>
13#include <asm/pgtable.h>
14#include <asm/ptrace.h>
15
16#include "proc-macros.S"
17
18	.text
19/*
20 * cpu_arm740_proc_init()
21 * cpu_arm740_do_idle()
22 * cpu_arm740_dcache_clean_area()
23 * cpu_arm740_switch_mm()
24 *
25 * These are not required.
26 */
27ENTRY(cpu_arm740_proc_init)
28ENTRY(cpu_arm740_do_idle)
29ENTRY(cpu_arm740_dcache_clean_area)
30ENTRY(cpu_arm740_switch_mm)
31	ret	lr
32
33/*
34 * cpu_arm740_proc_fin()
35 */
36ENTRY(cpu_arm740_proc_fin)
37	mrc	p15, 0, r0, c1, c0, 0
38	bic	r0, r0, #0x3f000000		@ bank/f/lock/s
39	bic	r0, r0, #0x0000000c		@ w-buffer/cache
40	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
41	ret	lr
42
43/*
44 * cpu_arm740_reset(loc)
45 * Params  : r0 = address to jump to
46 * Notes   : This sets up everything for a reset
47 */
48	.pushsection	.idmap.text, "ax"
49ENTRY(cpu_arm740_reset)
50	mov	ip, #0
51	mcr	p15, 0, ip, c7, c0, 0		@ invalidate cache
52	mrc	p15, 0, ip, c1, c0, 0		@ get ctrl register
53	bic	ip, ip, #0x0000000c		@ ............wc..
54	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
55	ret	r0
56ENDPROC(cpu_arm740_reset)
57	.popsection
58
59	.type	__arm740_setup, #function
60__arm740_setup:
61	mov	r0, #0
62	mcr	p15, 0, r0, c7, c0, 0		@ invalidate caches
63
64	mcr	p15, 0, r0, c6, c3		@ disable area 3~7
65	mcr	p15, 0, r0, c6, c4
66	mcr	p15, 0, r0, c6, c5
67	mcr	p15, 0, r0, c6, c6
68	mcr	p15, 0, r0, c6, c7
69
70	mov	r0, #0x0000003F			@ base = 0, size = 4GB
71	mcr	p15, 0, r0, c6,	c0		@ set area 0, default
72
73	ldr	r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
74	ldr	r3, =(CONFIG_DRAM_SIZE >> 12)	@ size of RAM (must be >= 4KB)
75	mov	r4, #10				@ 11 is the minimum (4KB)
761:	add	r4, r4, #1			@ area size *= 2
77	movs	r3, r3, lsr #1
78	bne	1b				@ count not zero r-shift
79	orr	r0, r0, r4, lsl #1		@ the area register value
80	orr	r0, r0, #1			@ set enable bit
81	mcr	p15, 0, r0, c6,	c1		@ set area 1, RAM
82
83	ldr	r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
84	ldr	r3, =(CONFIG_FLASH_SIZE >> 12)	@ size of FLASH (must be >= 4KB)
85	cmp	r3, #0
86	moveq	r0, #0
87	beq	2f
88	mov	r4, #10				@ 11 is the minimum (4KB)
891:	add	r4, r4, #1			@ area size *= 2
90	movs	r3, r3, lsr #1
91	bne	1b				@ count not zero r-shift
92	orr	r0, r0, r4, lsl #1		@ the area register value
93	orr	r0, r0, #1			@ set enable bit
942:	mcr	p15, 0, r0, c6,	c2		@ set area 2, ROM/FLASH
95
96	mov	r0, #0x06
97	mcr	p15, 0, r0, c2, c0		@ Region 1&2 cacheable
98#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
99	mov	r0, #0x00			@ disable whole write buffer
100#else
101	mov	r0, #0x02			@ Region 1 write bufferred
102#endif
103	mcr	p15, 0, r0, c3, c0
104
105	mov	r0, #0x10000
106	sub	r0, r0, #1			@ r0 = 0xffff
107	mcr	p15, 0, r0, c5, c0		@ all read/write access
108
109	mrc	p15, 0, r0, c1, c0		@ get control register
110	bic	r0, r0, #0x3F000000		@ set to standard caching mode
111						@ need some benchmark
112	orr	r0, r0, #0x0000000d		@ MPU/Cache/WB
113
114	ret	lr
115
116	.size	__arm740_setup, . - __arm740_setup
117
118	__INITDATA
119
120	@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
121	define_processor_functions arm740, dabort=v4t_late_abort, pabort=legacy_pabort, nommu=1
122
123	.section ".rodata"
124
125	string	cpu_arch_name, "armv4"
126	string	cpu_elf_name, "v4"
127	string	cpu_arm740_name, "ARM740T"
128
129	.align
130
131	.section ".proc.info.init", "a"
132	.type	__arm740_proc_info,#object
133__arm740_proc_info:
134	.long	0x41807400
135	.long	0xfffffff0
136	.long	0
137	.long	0
138	initfn	__arm740_setup, __arm740_proc_info
139	.long	cpu_arch_name
140	.long	cpu_elf_name
141	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT
142	.long	cpu_arm740_name
143	.long	arm740_processor_functions
144	.long	0
145	.long	0
146	.long	v4_cache_fns			@ cache model
147	.size	__arm740_proc_info, . - __arm740_proc_info
148