1 /* 2 * linux/arch/arm/mm/flush.c 3 * 4 * Copyright (C) 1995-2002 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/module.h> 11 #include <linux/mm.h> 12 #include <linux/pagemap.h> 13 14 #include <asm/cacheflush.h> 15 #include <asm/system.h> 16 #include <asm/tlbflush.h> 17 18 #ifdef CONFIG_CPU_CACHE_VIPT 19 #define ALIAS_FLUSH_START 0xffff4000 20 21 #define TOP_PTE(x) pte_offset_kernel(top_pmd, x) 22 23 static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) 24 { 25 unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT); 26 27 set_pte(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL)); 28 flush_tlb_kernel_page(to); 29 30 asm( "mcrr p15, 0, %1, %0, c14\n" 31 " mcrr p15, 0, %1, %0, c5\n" 32 : 33 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES) 34 : "cc"); 35 } 36 #else 37 #define flush_pfn_alias(pfn,vaddr) do { } while (0) 38 #endif 39 40 void __flush_dcache_page(struct address_space *mapping, struct page *page) 41 { 42 /* 43 * Writeback any data associated with the kernel mapping of this 44 * page. This ensures that data in the physical page is mutually 45 * coherent with the kernels mapping. 46 */ 47 __cpuc_flush_dcache_page(page_address(page)); 48 49 /* 50 * If this is a page cache page, and we have an aliasing VIPT cache, 51 * we only need to do one flush - which would be at the relevant 52 * userspace colour, which is congruent with page->index. 53 */ 54 if (mapping && cache_is_vipt_aliasing()) 55 flush_pfn_alias(page_to_pfn(page), 56 page->index << PAGE_CACHE_SHIFT); 57 } 58 59 static void __flush_dcache_aliases(struct address_space *mapping, struct page *page) 60 { 61 struct mm_struct *mm = current->active_mm; 62 struct vm_area_struct *mpnt; 63 struct prio_tree_iter iter; 64 pgoff_t pgoff; 65 66 /* 67 * There are possible user space mappings of this page: 68 * - VIVT cache: we need to also write back and invalidate all user 69 * data in the current VM view associated with this page. 70 * - aliasing VIPT: we only need to find one mapping of this page. 71 */ 72 pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT); 73 74 flush_dcache_mmap_lock(mapping); 75 vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) { 76 unsigned long offset; 77 78 /* 79 * If this VMA is not in our MM, we can ignore it. 80 */ 81 if (mpnt->vm_mm != mm) 82 continue; 83 if (!(mpnt->vm_flags & VM_MAYSHARE)) 84 continue; 85 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT; 86 flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page)); 87 } 88 flush_dcache_mmap_unlock(mapping); 89 } 90 91 /* 92 * Ensure cache coherency between kernel mapping and userspace mapping 93 * of this page. 94 * 95 * We have three cases to consider: 96 * - VIPT non-aliasing cache: fully coherent so nothing required. 97 * - VIVT: fully aliasing, so we need to handle every alias in our 98 * current VM view. 99 * - VIPT aliasing: need to handle one alias in our current VM view. 100 * 101 * If we need to handle aliasing: 102 * If the page only exists in the page cache and there are no user 103 * space mappings, we can be lazy and remember that we may have dirty 104 * kernel cache lines for later. Otherwise, we assume we have 105 * aliasing mappings. 106 */ 107 void flush_dcache_page(struct page *page) 108 { 109 struct address_space *mapping = page_mapping(page); 110 111 if (mapping && !mapping_mapped(mapping)) 112 set_bit(PG_dcache_dirty, &page->flags); 113 else { 114 __flush_dcache_page(mapping, page); 115 if (mapping && cache_is_vivt()) 116 __flush_dcache_aliases(mapping, page); 117 } 118 } 119 EXPORT_SYMBOL(flush_dcache_page); 120