1 /* 2 * linux/arch/arm/mm/fault-armv.c 3 * 4 * Copyright (C) 1995 Linus Torvalds 5 * Modifications for ARM processor (c) 1995-2002 Russell King 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #include <linux/module.h> 12 #include <linux/sched.h> 13 #include <linux/kernel.h> 14 #include <linux/mm.h> 15 #include <linux/bitops.h> 16 #include <linux/vmalloc.h> 17 #include <linux/init.h> 18 #include <linux/pagemap.h> 19 #include <linux/gfp.h> 20 21 #include <asm/bugs.h> 22 #include <asm/cacheflush.h> 23 #include <asm/cachetype.h> 24 #include <asm/pgtable.h> 25 #include <asm/tlbflush.h> 26 27 #include "mm.h" 28 29 static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE; 30 31 /* 32 * We take the easy way out of this problem - we make the 33 * PTE uncacheable. However, we leave the write buffer on. 34 * 35 * Note that the pte lock held when calling update_mmu_cache must also 36 * guard the pte (somewhere else in the same mm) that we modify here. 37 * Therefore those configurations which might call adjust_pte (those 38 * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock. 39 */ 40 static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address, 41 unsigned long pfn, pte_t *ptep) 42 { 43 pte_t entry = *ptep; 44 int ret; 45 46 /* 47 * If this page is present, it's actually being shared. 48 */ 49 ret = pte_present(entry); 50 51 /* 52 * If this page isn't present, or is already setup to 53 * fault (ie, is old), we can safely ignore any issues. 54 */ 55 if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) { 56 flush_cache_page(vma, address, pfn); 57 outer_flush_range((pfn << PAGE_SHIFT), 58 (pfn << PAGE_SHIFT) + PAGE_SIZE); 59 pte_val(entry) &= ~L_PTE_MT_MASK; 60 pte_val(entry) |= shared_pte_mask; 61 set_pte_at(vma->vm_mm, address, ptep, entry); 62 flush_tlb_page(vma, address); 63 } 64 65 return ret; 66 } 67 68 static int adjust_pte(struct vm_area_struct *vma, unsigned long address, 69 unsigned long pfn) 70 { 71 spinlock_t *ptl; 72 pgd_t *pgd; 73 pmd_t *pmd; 74 pte_t *pte; 75 int ret; 76 77 pgd = pgd_offset(vma->vm_mm, address); 78 if (pgd_none_or_clear_bad(pgd)) 79 return 0; 80 81 pmd = pmd_offset(pgd, address); 82 if (pmd_none_or_clear_bad(pmd)) 83 return 0; 84 85 /* 86 * This is called while another page table is mapped, so we 87 * must use the nested version. This also means we need to 88 * open-code the spin-locking. 89 */ 90 ptl = pte_lockptr(vma->vm_mm, pmd); 91 pte = pte_offset_map_nested(pmd, address); 92 spin_lock(ptl); 93 94 ret = do_adjust_pte(vma, address, pfn, pte); 95 96 spin_unlock(ptl); 97 pte_unmap_nested(pte); 98 99 return ret; 100 } 101 102 static void 103 make_coherent(struct address_space *mapping, struct vm_area_struct *vma, 104 unsigned long addr, pte_t *ptep, unsigned long pfn) 105 { 106 struct mm_struct *mm = vma->vm_mm; 107 struct vm_area_struct *mpnt; 108 struct prio_tree_iter iter; 109 unsigned long offset; 110 pgoff_t pgoff; 111 int aliases = 0; 112 113 pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT); 114 115 /* 116 * If we have any shared mappings that are in the same mm 117 * space, then we need to handle them specially to maintain 118 * cache coherency. 119 */ 120 flush_dcache_mmap_lock(mapping); 121 vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) { 122 /* 123 * If this VMA is not in our MM, we can ignore it. 124 * Note that we intentionally mask out the VMA 125 * that we are fixing up. 126 */ 127 if (mpnt->vm_mm != mm || mpnt == vma) 128 continue; 129 if (!(mpnt->vm_flags & VM_MAYSHARE)) 130 continue; 131 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT; 132 aliases += adjust_pte(mpnt, mpnt->vm_start + offset, pfn); 133 } 134 flush_dcache_mmap_unlock(mapping); 135 if (aliases) 136 do_adjust_pte(vma, addr, pfn, ptep); 137 } 138 139 /* 140 * Take care of architecture specific things when placing a new PTE into 141 * a page table, or changing an existing PTE. Basically, there are two 142 * things that we need to take care of: 143 * 144 * 1. If PG_dcache_dirty is set for the page, we need to ensure 145 * that any cache entries for the kernels virtual memory 146 * range are written back to the page. 147 * 2. If we have multiple shared mappings of the same space in 148 * an object, we need to deal with the cache aliasing issues. 149 * 150 * Note that the pte lock will be held. 151 */ 152 void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, 153 pte_t *ptep) 154 { 155 unsigned long pfn = pte_pfn(*ptep); 156 struct address_space *mapping; 157 struct page *page; 158 159 if (!pfn_valid(pfn)) 160 return; 161 162 /* 163 * The zero page is never written to, so never has any dirty 164 * cache lines, and therefore never needs to be flushed. 165 */ 166 page = pfn_to_page(pfn); 167 if (page == ZERO_PAGE(0)) 168 return; 169 170 mapping = page_mapping(page); 171 #ifndef CONFIG_SMP 172 if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) 173 __flush_dcache_page(mapping, page); 174 #endif 175 if (mapping) { 176 if (cache_is_vivt()) 177 make_coherent(mapping, vma, addr, ptep, pfn); 178 else if (vma->vm_flags & VM_EXEC) 179 __flush_icache_all(); 180 } 181 } 182 183 /* 184 * Check whether the write buffer has physical address aliasing 185 * issues. If it has, we need to avoid them for the case where 186 * we have several shared mappings of the same object in user 187 * space. 188 */ 189 static int __init check_writebuffer(unsigned long *p1, unsigned long *p2) 190 { 191 register unsigned long zero = 0, one = 1, val; 192 193 local_irq_disable(); 194 mb(); 195 *p1 = one; 196 mb(); 197 *p2 = zero; 198 mb(); 199 val = *p1; 200 mb(); 201 local_irq_enable(); 202 return val != zero; 203 } 204 205 void __init check_writebuffer_bugs(void) 206 { 207 struct page *page; 208 const char *reason; 209 unsigned long v = 1; 210 211 printk(KERN_INFO "CPU: Testing write buffer coherency: "); 212 213 page = alloc_page(GFP_KERNEL); 214 if (page) { 215 unsigned long *p1, *p2; 216 pgprot_t prot = __pgprot_modify(PAGE_KERNEL, 217 L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE); 218 219 p1 = vmap(&page, 1, VM_IOREMAP, prot); 220 p2 = vmap(&page, 1, VM_IOREMAP, prot); 221 222 if (p1 && p2) { 223 v = check_writebuffer(p1, p2); 224 reason = "enabling work-around"; 225 } else { 226 reason = "unable to map memory\n"; 227 } 228 229 vunmap(p1); 230 vunmap(p2); 231 put_page(page); 232 } else { 233 reason = "unable to grab page\n"; 234 } 235 236 if (v) { 237 printk("failed, %s\n", reason); 238 shared_pte_mask = L_PTE_MT_UNCACHED; 239 } else { 240 printk("ok\n"); 241 } 242 } 243