xref: /linux/arch/arm/mm/dma-mapping-nommu.c (revision 249ebf3f65f8530beb2cbfb91bff1d83ba88d23c)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  Based on linux/arch/arm/mm/dma-mapping.c
4  *
5  *  Copyright (C) 2000-2004 Russell King
6  */
7 
8 #include <linux/dma-map-ops.h>
9 #include <asm/cachetype.h>
10 #include <asm/cacheflush.h>
11 #include <asm/outercache.h>
12 #include <asm/cp15.h>
13 
14 #include "dma.h"
15 
16 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
17 		enum dma_data_direction dir)
18 {
19 	dmac_map_area(__va(paddr), size, dir);
20 
21 	if (dir == DMA_FROM_DEVICE)
22 		outer_inv_range(paddr, paddr + size);
23 	else
24 		outer_clean_range(paddr, paddr + size);
25 }
26 
27 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
28 		enum dma_data_direction dir)
29 {
30 	if (dir != DMA_TO_DEVICE) {
31 		outer_inv_range(paddr, paddr + size);
32 		dmac_unmap_area(__va(paddr), size, dir);
33 	}
34 }
35 
36 void arch_setup_dma_ops(struct device *dev, bool coherent)
37 {
38 	if (IS_ENABLED(CONFIG_CPU_V7M)) {
39 		/*
40 		 * Cache support for v7m is optional, so can be treated as
41 		 * coherent if no cache has been detected. Note that it is not
42 		 * enough to check if MPU is in use or not since in absense of
43 		 * MPU system memory map is used.
44 		 */
45 		dev->dma_coherent = cacheid ? coherent : true;
46 	} else {
47 		/*
48 		 * Assume coherent DMA in case MMU/MPU has not been set up.
49 		 */
50 		dev->dma_coherent = (get_cr() & CR_M) ? coherent : true;
51 	}
52 }
53