1/* SPDX-License-Identifier: GPL-2.0 */ 2#include <linux/linkage.h> 3#include <asm/assembler.h> 4#include "abort-macro.S" 5/* 6 * Function: v6_early_abort 7 * 8 * Params : r2 = pt_regs 9 * : r4 = aborted context pc 10 * : r5 = aborted context psr 11 * 12 * Returns : r4 - r11, r13 preserved 13 * 14 * Purpose : obtain information about current aborted instruction. 15 * Note: we read user space. This means we might cause a data 16 * abort here if the I-TLB and D-TLB aren't seeing the same 17 * picture. Unfortunately, this does happen. We live with it. 18 */ 19 .arch armv6k 20 .align 5 21ENTRY(v6_early_abort) 22 mrc p15, 0, r1, c5, c0, 0 @ get FSR 23 mrc p15, 0, r0, c6, c0, 0 @ get FAR 24/* 25 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR. 26 */ 27#ifdef CONFIG_ARM_ERRATA_326103 28 ldr ip, =0x4107b36 29 mrc p15, 0, r3, c0, c0, 0 @ get processor id 30 teq ip, r3, lsr #4 @ r0 ARM1136? 31 bne 1f 32 tst r5, #PSR_J_BIT @ Java? 33 tsteq r5, #PSR_T_BIT @ Thumb? 34 bne 1f 35 bic r1, r1, #1 << 11 @ clear bit 11 of FSR 36 ldr r3, [r4] @ read aborted ARM instruction 37 ARM_BE8(rev r3, r3) 38 39 teq_ldrd tmp=ip, insn=r3 @ insn was LDRD? 40 beq 1f @ yes 41 tst r3, #1 << 20 @ L = 0 -> write 42 orreq r1, r1, #1 << 11 @ yes. 43#endif 441: uaccess_disable ip @ disable userspace access 45 b do_DataAbort 46