1b2441318SGreg Kroah-Hartman/* SPDX-License-Identifier: GPL-2.0 */ 21da177e4SLinus Torvalds#include <linux/linkage.h> 31da177e4SLinus Torvalds#include <asm/assembler.h> 43a1e5015SGeorge G. Davis#include "abort-macro.S" 51da177e4SLinus Torvalds/* 61da177e4SLinus Torvalds * Function: v6_early_abort 71da177e4SLinus Torvalds * 8da740472SRussell King * Params : r2 = pt_regs 9da740472SRussell King * : r4 = aborted context pc 103e287becSRussell King * : r5 = aborted context psr 111da177e4SLinus Torvalds * 12da740472SRussell King * Returns : r4 - r11, r13 preserved 131da177e4SLinus Torvalds * 141da177e4SLinus Torvalds * Purpose : obtain information about current aborted instruction. 153a1e5015SGeorge G. Davis * Note: we read user space. This means we might cause a data 163a1e5015SGeorge G. Davis * abort here if the I-TLB and D-TLB aren't seeing the same 173a1e5015SGeorge G. Davis * picture. Unfortunately, this does happen. We live with it. 181da177e4SLinus Torvalds */ 19*a2faac39SNick Desaulniers .arch armv6k 201da177e4SLinus Torvalds .align 5 211da177e4SLinus TorvaldsENTRY(v6_early_abort) 221da177e4SLinus Torvalds mrc p15, 0, r1, c5, c0, 0 @ get FSR 231da177e4SLinus Torvalds mrc p15, 0, r0, c6, c0, 0 @ get FAR 243a1e5015SGeorge G. Davis/* 25f0c4b8d6SWill Deacon * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR. 263a1e5015SGeorge G. Davis */ 27f0c4b8d6SWill Deacon#ifdef CONFIG_ARM_ERRATA_326103 28f0c4b8d6SWill Deacon ldr ip, =0x4107b36 29f0c4b8d6SWill Deacon mrc p15, 0, r3, c0, c0, 0 @ get processor id 30f0c4b8d6SWill Deacon teq ip, r3, lsr #4 @ r0 ARM1136? 312190fed6SRussell King bne 1f 32f0c4b8d6SWill Deacon tst r5, #PSR_J_BIT @ Java? 33f0c4b8d6SWill Deacon tsteq r5, #PSR_T_BIT @ Thumb? 342190fed6SRussell King bne 1f 35f0c4b8d6SWill Deacon bic r1, r1, #1 << 11 @ clear bit 11 of FSR 36f0c4b8d6SWill Deacon ldr r3, [r4] @ read aborted ARM instruction 37457c2403SBen Dooks ARM_BE8(rev r3, r3) 38457c2403SBen Dooks 3908446b12SRussell King teq_ldrd tmp=ip, insn=r3 @ insn was LDRD? 402190fed6SRussell King beq 1f @ yes 413a1e5015SGeorge G. Davis tst r3, #1 << 20 @ L = 0 -> write 423a1e5015SGeorge G. Davis orreq r1, r1, #1 << 11 @ yes. 43f0c4b8d6SWill Deacon#endif 442190fed6SRussell King1: uaccess_disable ip @ disable userspace access 45da740472SRussell King b do_DataAbort 46