1b85a3ef4SJohn Linn /* 2b85a3ef4SJohn Linn * This file contains common code that is intended to be used across 3b85a3ef4SJohn Linn * boards so that it's not replicated. 4b85a3ef4SJohn Linn * 5b85a3ef4SJohn Linn * Copyright (C) 2011 Xilinx 6b85a3ef4SJohn Linn * 7b85a3ef4SJohn Linn * This software is licensed under the terms of the GNU General Public 8b85a3ef4SJohn Linn * License version 2, as published by the Free Software Foundation, and 9b85a3ef4SJohn Linn * may be copied, distributed, and modified under those terms. 10b85a3ef4SJohn Linn * 11b85a3ef4SJohn Linn * This program is distributed in the hope that it will be useful, 12b85a3ef4SJohn Linn * but WITHOUT ANY WARRANTY; without even the implied warranty of 13b85a3ef4SJohn Linn * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14b85a3ef4SJohn Linn * GNU General Public License for more details. 15b85a3ef4SJohn Linn */ 16b85a3ef4SJohn Linn 17b85a3ef4SJohn Linn #include <linux/init.h> 18b85a3ef4SJohn Linn #include <linux/kernel.h> 19b85a3ef4SJohn Linn #include <linux/cpumask.h> 20b85a3ef4SJohn Linn #include <linux/platform_device.h> 21b85a3ef4SJohn Linn #include <linux/clk.h> 220f586fbfSJosh Cartwright #include <linux/clk/zynq.h> 230f586fbfSJosh Cartwright #include <linux/of_address.h> 24b85a3ef4SJohn Linn #include <linux/of_irq.h> 25b85a3ef4SJohn Linn #include <linux/of_platform.h> 263d64b449SArnd Bergmann #include <linux/of.h> 27b85a3ef4SJohn Linn 283d64b449SArnd Bergmann #include <asm/mach/arch.h> 29b85a3ef4SJohn Linn #include <asm/mach/map.h> 3003e07595SJosh Cartwright #include <asm/mach/time.h> 313d64b449SArnd Bergmann #include <asm/mach-types.h> 32b85a3ef4SJohn Linn #include <asm/page.h> 33b85a3ef4SJohn Linn #include <asm/hardware/gic.h> 34b85a3ef4SJohn Linn #include <asm/hardware/cache-l2x0.h> 35b85a3ef4SJohn Linn 36b85a3ef4SJohn Linn #include <mach/zynq_soc.h> 37b85a3ef4SJohn Linn #include "common.h" 38b85a3ef4SJohn Linn 39b85a3ef4SJohn Linn static struct of_device_id zynq_of_bus_ids[] __initdata = { 40b85a3ef4SJohn Linn { .compatible = "simple-bus", }, 41b85a3ef4SJohn Linn {} 42b85a3ef4SJohn Linn }; 43b85a3ef4SJohn Linn 44b85a3ef4SJohn Linn /** 45b85a3ef4SJohn Linn * xilinx_init_machine() - System specific initialization, intended to be 46b85a3ef4SJohn Linn * called from board specific initialization. 47b85a3ef4SJohn Linn */ 483d64b449SArnd Bergmann static void __init xilinx_init_machine(void) 49b85a3ef4SJohn Linn { 50b85a3ef4SJohn Linn /* 51b85a3ef4SJohn Linn * 64KB way size, 8-way associativity, parity disabled 52b85a3ef4SJohn Linn */ 530fcfdbcaSJosh Cartwright l2x0_of_init(0x02060000, 0xF0F0FFFF); 54b85a3ef4SJohn Linn 55b85a3ef4SJohn Linn of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); 56b85a3ef4SJohn Linn } 57b85a3ef4SJohn Linn 58f447ed2dSJosh Cartwright static struct of_device_id irq_match[] __initdata = { 59f447ed2dSJosh Cartwright { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 60f447ed2dSJosh Cartwright { } 61f447ed2dSJosh Cartwright }; 62f447ed2dSJosh Cartwright 63b85a3ef4SJohn Linn /** 64b85a3ef4SJohn Linn * xilinx_irq_init() - Interrupt controller initialization for the GIC. 65b85a3ef4SJohn Linn */ 663d64b449SArnd Bergmann static void __init xilinx_irq_init(void) 67b85a3ef4SJohn Linn { 68f447ed2dSJosh Cartwright of_irq_init(irq_match); 69b85a3ef4SJohn Linn } 70b85a3ef4SJohn Linn 71b85a3ef4SJohn Linn /* The minimum devices needed to be mapped before the VM system is up and 72b85a3ef4SJohn Linn * running include the GIC, UART and Timer Counter. 73b85a3ef4SJohn Linn */ 74b85a3ef4SJohn Linn 75*385f02b1SJosh Cartwright static struct map_desc scu_desc __initdata = { 76b85a3ef4SJohn Linn .virtual = SCU_PERIPH_VIRT, 77b85a3ef4SJohn Linn .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), 78f5800776SJosh Cartwright .length = SCU_PERIPH_SIZE, 79b85a3ef4SJohn Linn .type = MT_DEVICE, 80b85a3ef4SJohn Linn }; 81b85a3ef4SJohn Linn 8203e07595SJosh Cartwright static void __init xilinx_zynq_timer_init(void) 8303e07595SJosh Cartwright { 840f586fbfSJosh Cartwright struct device_node *np; 850f586fbfSJosh Cartwright void __iomem *slcr; 860f586fbfSJosh Cartwright 870f586fbfSJosh Cartwright np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); 880f586fbfSJosh Cartwright slcr = of_iomap(np, 0); 890f586fbfSJosh Cartwright WARN_ON(!slcr); 900f586fbfSJosh Cartwright 910f586fbfSJosh Cartwright xilinx_zynq_clocks_init(slcr); 920f586fbfSJosh Cartwright 9303e07595SJosh Cartwright xttcpss_timer_init(); 9403e07595SJosh Cartwright } 9503e07595SJosh Cartwright 9603e07595SJosh Cartwright /* 9703e07595SJosh Cartwright * Instantiate and initialize the system timer structure 9803e07595SJosh Cartwright */ 9903e07595SJosh Cartwright static struct sys_timer xttcpss_sys_timer = { 10003e07595SJosh Cartwright .init = xilinx_zynq_timer_init, 10103e07595SJosh Cartwright }; 10203e07595SJosh Cartwright 103b85a3ef4SJohn Linn /** 104b85a3ef4SJohn Linn * xilinx_map_io() - Create memory mappings needed for early I/O. 105b85a3ef4SJohn Linn */ 1063d64b449SArnd Bergmann static void __init xilinx_map_io(void) 107b85a3ef4SJohn Linn { 108*385f02b1SJosh Cartwright debug_ll_io_init(); 109*385f02b1SJosh Cartwright iotable_init(&scu_desc, 1); 110b85a3ef4SJohn Linn } 1113d64b449SArnd Bergmann 1123d64b449SArnd Bergmann static const char *xilinx_dt_match[] = { 113e06f1a9eSJosh Cartwright "xlnx,zynq-zc702", 114e06f1a9eSJosh Cartwright "xlnx,zynq-7000", 1153d64b449SArnd Bergmann NULL 1163d64b449SArnd Bergmann }; 1173d64b449SArnd Bergmann 1183d64b449SArnd Bergmann MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 1193d64b449SArnd Bergmann .map_io = xilinx_map_io, 1203d64b449SArnd Bergmann .init_irq = xilinx_irq_init, 121368b8e25SMarc Zyngier .handle_irq = gic_handle_irq, 1223d64b449SArnd Bergmann .init_machine = xilinx_init_machine, 1233d64b449SArnd Bergmann .timer = &xttcpss_sys_timer, 1243d64b449SArnd Bergmann .dt_compat = xilinx_dt_match, 1253d64b449SArnd Bergmann MACHINE_END 126