xref: /linux/arch/arm/mach-zynq/common.c (revision 03e07595febc4857b2b6ad756826f369c7628ec8)
1b85a3ef4SJohn Linn /*
2b85a3ef4SJohn Linn  * This file contains common code that is intended to be used across
3b85a3ef4SJohn Linn  * boards so that it's not replicated.
4b85a3ef4SJohn Linn  *
5b85a3ef4SJohn Linn  *  Copyright (C) 2011 Xilinx
6b85a3ef4SJohn Linn  *
7b85a3ef4SJohn Linn  * This software is licensed under the terms of the GNU General Public
8b85a3ef4SJohn Linn  * License version 2, as published by the Free Software Foundation, and
9b85a3ef4SJohn Linn  * may be copied, distributed, and modified under those terms.
10b85a3ef4SJohn Linn  *
11b85a3ef4SJohn Linn  * This program is distributed in the hope that it will be useful,
12b85a3ef4SJohn Linn  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13b85a3ef4SJohn Linn  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b85a3ef4SJohn Linn  * GNU General Public License for more details.
15b85a3ef4SJohn Linn  */
16b85a3ef4SJohn Linn 
17b85a3ef4SJohn Linn #include <linux/init.h>
18b85a3ef4SJohn Linn #include <linux/kernel.h>
19b85a3ef4SJohn Linn #include <linux/cpumask.h>
20b85a3ef4SJohn Linn #include <linux/platform_device.h>
21b85a3ef4SJohn Linn #include <linux/clk.h>
22b85a3ef4SJohn Linn #include <linux/of_irq.h>
23b85a3ef4SJohn Linn #include <linux/of_platform.h>
243d64b449SArnd Bergmann #include <linux/of.h>
25b85a3ef4SJohn Linn 
263d64b449SArnd Bergmann #include <asm/mach/arch.h>
27b85a3ef4SJohn Linn #include <asm/mach/map.h>
28*03e07595SJosh Cartwright #include <asm/mach/time.h>
293d64b449SArnd Bergmann #include <asm/mach-types.h>
30b85a3ef4SJohn Linn #include <asm/page.h>
31b85a3ef4SJohn Linn #include <asm/hardware/gic.h>
32b85a3ef4SJohn Linn #include <asm/hardware/cache-l2x0.h>
33b85a3ef4SJohn Linn 
34b85a3ef4SJohn Linn #include <mach/zynq_soc.h>
35b85a3ef4SJohn Linn #include "common.h"
36b85a3ef4SJohn Linn 
37b85a3ef4SJohn Linn static struct of_device_id zynq_of_bus_ids[] __initdata = {
38b85a3ef4SJohn Linn 	{ .compatible = "simple-bus", },
39b85a3ef4SJohn Linn 	{}
40b85a3ef4SJohn Linn };
41b85a3ef4SJohn Linn 
42b85a3ef4SJohn Linn /**
43b85a3ef4SJohn Linn  * xilinx_init_machine() - System specific initialization, intended to be
44b85a3ef4SJohn Linn  *			   called from board specific initialization.
45b85a3ef4SJohn Linn  */
463d64b449SArnd Bergmann static void __init xilinx_init_machine(void)
47b85a3ef4SJohn Linn {
48b85a3ef4SJohn Linn 	/*
49b85a3ef4SJohn Linn 	 * 64KB way size, 8-way associativity, parity disabled
50b85a3ef4SJohn Linn 	 */
510fcfdbcaSJosh Cartwright 	l2x0_of_init(0x02060000, 0xF0F0FFFF);
52b85a3ef4SJohn Linn 
53b85a3ef4SJohn Linn 	of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
54b85a3ef4SJohn Linn }
55b85a3ef4SJohn Linn 
56f447ed2dSJosh Cartwright static struct of_device_id irq_match[] __initdata = {
57f447ed2dSJosh Cartwright 	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
58f447ed2dSJosh Cartwright 	{ }
59f447ed2dSJosh Cartwright };
60f447ed2dSJosh Cartwright 
61b85a3ef4SJohn Linn /**
62b85a3ef4SJohn Linn  * xilinx_irq_init() - Interrupt controller initialization for the GIC.
63b85a3ef4SJohn Linn  */
643d64b449SArnd Bergmann static void __init xilinx_irq_init(void)
65b85a3ef4SJohn Linn {
66f447ed2dSJosh Cartwright 	of_irq_init(irq_match);
67b85a3ef4SJohn Linn }
68b85a3ef4SJohn Linn 
69b85a3ef4SJohn Linn /* The minimum devices needed to be mapped before the VM system is up and
70b85a3ef4SJohn Linn  * running include the GIC, UART and Timer Counter.
71b85a3ef4SJohn Linn  */
72b85a3ef4SJohn Linn 
73b85a3ef4SJohn Linn static struct map_desc io_desc[] __initdata = {
74b85a3ef4SJohn Linn 	{
75b85a3ef4SJohn Linn 		.virtual	= TTC0_VIRT,
76b85a3ef4SJohn Linn 		.pfn		= __phys_to_pfn(TTC0_PHYS),
77f5800776SJosh Cartwright 		.length		= TTC0_SIZE,
78b85a3ef4SJohn Linn 		.type		= MT_DEVICE,
79b85a3ef4SJohn Linn 	}, {
80b85a3ef4SJohn Linn 		.virtual	= SCU_PERIPH_VIRT,
81b85a3ef4SJohn Linn 		.pfn		= __phys_to_pfn(SCU_PERIPH_PHYS),
82f5800776SJosh Cartwright 		.length		= SCU_PERIPH_SIZE,
83b85a3ef4SJohn Linn 		.type		= MT_DEVICE,
84b85a3ef4SJohn Linn 	},
85b85a3ef4SJohn Linn 
86b85a3ef4SJohn Linn #ifdef CONFIG_DEBUG_LL
87b85a3ef4SJohn Linn 	{
88b85a3ef4SJohn Linn 		.virtual	= UART0_VIRT,
89b85a3ef4SJohn Linn 		.pfn		= __phys_to_pfn(UART0_PHYS),
90f5800776SJosh Cartwright 		.length		= UART0_SIZE,
91b85a3ef4SJohn Linn 		.type		= MT_DEVICE,
92b85a3ef4SJohn Linn 	},
93b85a3ef4SJohn Linn #endif
94b85a3ef4SJohn Linn 
95b85a3ef4SJohn Linn };
96b85a3ef4SJohn Linn 
97*03e07595SJosh Cartwright static void __init xilinx_zynq_timer_init(void)
98*03e07595SJosh Cartwright {
99*03e07595SJosh Cartwright 	xttcpss_timer_init();
100*03e07595SJosh Cartwright }
101*03e07595SJosh Cartwright 
102*03e07595SJosh Cartwright /*
103*03e07595SJosh Cartwright  * Instantiate and initialize the system timer structure
104*03e07595SJosh Cartwright  */
105*03e07595SJosh Cartwright static struct sys_timer xttcpss_sys_timer = {
106*03e07595SJosh Cartwright 	.init		= xilinx_zynq_timer_init,
107*03e07595SJosh Cartwright };
108*03e07595SJosh Cartwright 
109b85a3ef4SJohn Linn /**
110b85a3ef4SJohn Linn  * xilinx_map_io() - Create memory mappings needed for early I/O.
111b85a3ef4SJohn Linn  */
1123d64b449SArnd Bergmann static void __init xilinx_map_io(void)
113b85a3ef4SJohn Linn {
114b85a3ef4SJohn Linn 	iotable_init(io_desc, ARRAY_SIZE(io_desc));
115b85a3ef4SJohn Linn }
1163d64b449SArnd Bergmann 
1173d64b449SArnd Bergmann static const char *xilinx_dt_match[] = {
1183d64b449SArnd Bergmann 	"xlnx,zynq-ep107",
1193d64b449SArnd Bergmann 	NULL
1203d64b449SArnd Bergmann };
1213d64b449SArnd Bergmann 
1223d64b449SArnd Bergmann MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
1233d64b449SArnd Bergmann 	.map_io		= xilinx_map_io,
1243d64b449SArnd Bergmann 	.init_irq	= xilinx_irq_init,
125368b8e25SMarc Zyngier 	.handle_irq	= gic_handle_irq,
1263d64b449SArnd Bergmann 	.init_machine	= xilinx_init_machine,
1273d64b449SArnd Bergmann 	.timer		= &xttcpss_sys_timer,
1283d64b449SArnd Bergmann 	.dt_compat	= xilinx_dt_match,
1293d64b449SArnd Bergmann MACHINE_END
130