xref: /linux/arch/arm/mach-vt8500/vt8500.c (revision 06ff14c05426ec7b7600521c4e1ae19732797e15)
1 /*
2  *  arch/arm/mach-vt8500/vt8500.c
3  *
4  *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 
21 #include <linux/clocksource.h>
22 #include <linux/io.h>
23 #include <linux/irqchip.h>
24 #include <linux/pm.h>
25 
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/time.h>
29 #include <asm/mach/map.h>
30 
31 #include <linux/of.h>
32 #include <linux/of_address.h>
33 #include <linux/of_irq.h>
34 #include <linux/of_platform.h>
35 
36 #include "common.h"
37 
38 #define LEGACY_GPIO_BASE	0xD8110000
39 #define LEGACY_PMC_BASE		0xD8130000
40 
41 /* Registers in GPIO Controller */
42 #define VT8500_GPIO_MUX_REG	0x200
43 
44 /* Registers in Power Management Controller */
45 #define VT8500_HCR_REG		0x12
46 #define VT8500_PMSR_REG		0x60
47 
48 static void __iomem *pmc_base;
49 
50 void vt8500_restart(char mode, const char *cmd)
51 {
52 	if (pmc_base)
53 		writel(1, pmc_base + VT8500_PMSR_REG);
54 }
55 
56 static struct map_desc vt8500_io_desc[] __initdata = {
57 	/* SoC MMIO registers */
58 	[0] = {
59 		.virtual	= 0xf8000000,
60 		.pfn		= __phys_to_pfn(0xd8000000),
61 		.length		= 0x00390000, /* max of all chip variants */
62 		.type		= MT_DEVICE
63 	},
64 };
65 
66 void __init vt8500_map_io(void)
67 {
68 	iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc));
69 }
70 
71 static void vt8500_power_off(void)
72 {
73 	local_irq_disable();
74 	writew(5, pmc_base + VT8500_HCR_REG);
75 	asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
76 }
77 
78 void __init vt8500_init(void)
79 {
80 	struct device_node *np;
81 #if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505)
82 	struct device_node *fb;
83 	void __iomem *gpio_base;
84 #endif
85 
86 #ifdef CONFIG_FB_VT8500
87 	fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
88 	if (fb) {
89 		np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio");
90 		if (np) {
91 			gpio_base = of_iomap(np, 0);
92 
93 			if (!gpio_base)
94 				pr_err("%s: of_iomap(gpio_mux) failed\n",
95 								__func__);
96 
97 			of_node_put(np);
98 		} else {
99 			gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
100 			if (!gpio_base)
101 				pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
102 								__func__);
103 		}
104 		if (gpio_base) {
105 			writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
106 				gpio_base + VT8500_GPIO_MUX_REG);
107 			iounmap(gpio_base);
108 		} else
109 			pr_err("%s: Could not remap GPIO mux\n", __func__);
110 
111 		of_node_put(fb);
112 	}
113 #endif
114 
115 #ifdef CONFIG_FB_WM8505
116 	fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb");
117 	if (fb) {
118 		np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio");
119 		if (!np)
120 			np = of_find_compatible_node(NULL, NULL,
121 							"wm,wm8650-gpio");
122 		if (np) {
123 			gpio_base = of_iomap(np, 0);
124 
125 			if (!gpio_base)
126 				pr_err("%s: of_iomap(gpio_mux) failed\n",
127 								__func__);
128 
129 			of_node_put(np);
130 		} else {
131 			gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
132 			if (!gpio_base)
133 				pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
134 								__func__);
135 		}
136 		if (gpio_base) {
137 			writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
138 				0x80000000, gpio_base + VT8500_GPIO_MUX_REG);
139 			iounmap(gpio_base);
140 		} else
141 			pr_err("%s: Could not remap GPIO mux\n", __func__);
142 
143 		of_node_put(fb);
144 	}
145 #endif
146 
147 	np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
148 	if (np) {
149 		pmc_base = of_iomap(np, 0);
150 
151 		if (!pmc_base)
152 			pr_err("%s:of_iomap(pmc) failed\n", __func__);
153 
154 		of_node_put(np);
155 	} else {
156 		pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
157 		if (!pmc_base)
158 			pr_err("%s:ioremap(power_off) failed\n", __func__);
159 	}
160 	if (pmc_base)
161 		pm_power_off = &vt8500_power_off;
162 	else
163 		pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
164 
165 	vtwm_clk_init(pmc_base);
166 
167 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
168 }
169 
170 static const char * const vt8500_dt_compat[] = {
171 	"via,vt8500",
172 	"wm,wm8650",
173 	"wm,wm8505",
174 	"wm,wm8750",
175 	"wm,wm8850",
176 };
177 
178 DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
179 	.dt_compat	= vt8500_dt_compat,
180 	.map_io		= vt8500_map_io,
181 	.init_irq	= irqchip_init,
182 	.init_machine	= vt8500_init,
183 	.init_time	= clocksource_of_init,
184 	.restart	= vt8500_restart,
185 MACHINE_END
186 
187