xref: /linux/arch/arm/mach-tegra/sleep-tegra20.S (revision b889fcf63cb62e7fdb7816565e28f44dbe4a76a5)
1/*
2 * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.
3 * Copyright (c) 2011, Google, Inc.
4 *
5 * Author: Colin Cross <ccross@android.com>
6 *         Gary King <gking@nvidia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <linux/linkage.h>
22
23#include <asm/assembler.h>
24
25#include "sleep.h"
26#include "flowctrl.h"
27
28#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP)
29/*
30 * tegra20_hotplug_shutdown(void)
31 *
32 * puts the current cpu in reset
33 * should never return
34 */
35ENTRY(tegra20_hotplug_shutdown)
36	/* Turn off SMP coherency */
37	exit_smp r4, r5
38
39	/* Put this CPU down */
40	cpu_id	r0
41	bl	tegra20_cpu_shutdown
42	mov	pc, lr			@ should never get here
43ENDPROC(tegra20_hotplug_shutdown)
44
45/*
46 * tegra20_cpu_shutdown(int cpu)
47 *
48 * r0 is cpu to reset
49 *
50 * puts the specified CPU in wait-for-event mode on the flow controller
51 * and puts the CPU in reset
52 * can be called on the current cpu or another cpu
53 * if called on the current cpu, does not return
54 * MUST NOT BE CALLED FOR CPU 0.
55 *
56 * corrupts r0-r3, r12
57 */
58ENTRY(tegra20_cpu_shutdown)
59	cmp	r0, #0
60	moveq	pc, lr			@ must not be called for CPU 0
61
62	cpu_to_halt_reg r1, r0
63	ldr	r3, =TEGRA_FLOW_CTRL_VIRT
64	mov	r2, #FLOW_CTRL_WAITEVENT | FLOW_CTRL_JTAG_RESUME
65	str	r2, [r3, r1]		@ put flow controller in wait event mode
66	ldr	r2, [r3, r1]
67	isb
68	dsb
69	movw	r1, 0x1011
70	mov	r1, r1, lsl r0
71	ldr	r3, =TEGRA_CLK_RESET_VIRT
72	str	r1, [r3, #0x340]	@ put slave CPU in reset
73	isb
74	dsb
75	cpu_id	r3
76	cmp	r3, r0
77	beq	.
78	mov	pc, lr
79ENDPROC(tegra20_cpu_shutdown)
80#endif
81