1if ARCH_TEGRA 2 3comment "NVIDIA Tegra options" 4 5config ARCH_TEGRA_2x_SOC 6 bool "Enable support for Tegra20 family" 7 select CPU_V7 8 select ARM_GIC 9 select ARCH_REQUIRE_GPIOLIB 10 select PINCTRL 11 select PINCTRL_TEGRA20 12 select USB_ARCH_HAS_EHCI if USB_SUPPORT 13 select USB_ULPI if USB 14 select USB_ULPI_VIEWPORT if USB_SUPPORT 15 select ARM_ERRATA_720789 16 select ARM_ERRATA_742230 17 select ARM_ERRATA_751472 18 select ARM_ERRATA_754327 19 select ARM_ERRATA_764369 20 select PL310_ERRATA_727915 if CACHE_L2X0 21 select PL310_ERRATA_769419 if CACHE_L2X0 22 select CPU_FREQ_TABLE if CPU_FREQ 23 help 24 Support for NVIDIA Tegra AP20 and T20 processors, based on the 25 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 26 27config ARCH_TEGRA_3x_SOC 28 bool "Enable support for Tegra30 family" 29 select CPU_V7 30 select ARM_GIC 31 select ARCH_REQUIRE_GPIOLIB 32 select PINCTRL 33 select PINCTRL_TEGRA30 34 select USB_ARCH_HAS_EHCI if USB_SUPPORT 35 select USB_ULPI if USB 36 select USB_ULPI_VIEWPORT if USB_SUPPORT 37 select ARM_ERRATA_743622 38 select ARM_ERRATA_751472 39 select ARM_ERRATA_754322 40 select ARM_ERRATA_764369 41 select PL310_ERRATA_769419 if CACHE_L2X0 42 select CPU_FREQ_TABLE if CPU_FREQ 43 help 44 Support for NVIDIA Tegra T30 processor family, based on the 45 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 46 47config TEGRA_PCI 48 bool "PCI Express support" 49 depends on ARCH_TEGRA_2x_SOC 50 select PCI 51 52config TEGRA_AHB 53 bool "Enable AHB driver for NVIDIA Tegra SoCs" 54 default y 55 help 56 Adds AHB configuration functionality for NVIDIA Tegra SoCs, 57 which controls AHB bus master arbitration and some 58 perfomance parameters(priority, prefech size). 59 60comment "Tegra board type" 61 62choice 63 prompt "Default low-level debug console UART" 64 default TEGRA_DEBUG_UART_NONE 65 66config TEGRA_DEBUG_UART_NONE 67 bool "None" 68 69config TEGRA_DEBUG_UARTA 70 bool "UART-A" 71 72config TEGRA_DEBUG_UARTB 73 bool "UART-B" 74 75config TEGRA_DEBUG_UARTC 76 bool "UART-C" 77 78config TEGRA_DEBUG_UARTD 79 bool "UART-D" 80 81config TEGRA_DEBUG_UARTE 82 bool "UART-E" 83 84endchoice 85 86choice 87 prompt "Automatic low-level debug console UART" 88 default TEGRA_DEBUG_UART_AUTO_NONE 89 90config TEGRA_DEBUG_UART_AUTO_NONE 91 bool "None" 92 93config TEGRA_DEBUG_UART_AUTO_ODMDATA 94 bool "Via ODMDATA" 95 help 96 Automatically determines which UART to use for low-level debug based 97 on the ODMDATA value. This value is part of the BCT, and is written 98 to the boot memory device using nvflash, or other flashing tool. 99 When bits 19:18 are 3, then bits 17:15 indicate which UART to use; 100 0/1/2/3/4 are UART A/B/C/D/E. 101 102config TEGRA_DEBUG_UART_AUTO_SCRATCH 103 bool "Via UART scratch register" 104 help 105 Automatically determines which UART to use for low-level debug based 106 on the UART scratch register value. Some bootloaders put ASCII 'D' 107 in this register when they initialize their own console UART output. 108 Using this option allows the kernel to automatically pick the same 109 UART. 110 111endchoice 112 113config TEGRA_EMC_SCALING_ENABLE 114 bool "Enable scaling the memory frequency" 115 116endif 117