1 /* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * Copyright 2012 Pavel Machek <pavel@denx.de> 4 * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. 5 * Copyright (C) 2012 Altera Corporation 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, 9 * version 2, as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along with 17 * this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 #include <linux/delay.h> 20 #include <linux/init.h> 21 #include <linux/smp.h> 22 #include <linux/io.h> 23 #include <linux/of.h> 24 #include <linux/of_address.h> 25 26 #include <asm/cacheflush.h> 27 #include <asm/hardware/gic.h> 28 #include <asm/smp_scu.h> 29 #include <asm/smp_plat.h> 30 31 #include "core.h" 32 33 extern void __iomem *sys_manager_base_addr; 34 extern void __iomem *rst_manager_base_addr; 35 36 static void __cpuinit socfpga_secondary_init(unsigned int cpu) 37 { 38 /* 39 * if any interrupts are already enabled for the primary 40 * core (e.g. timer irq), then they will not have been enabled 41 * for us: do so 42 */ 43 gic_secondary_init(0); 44 } 45 46 static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) 47 { 48 int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; 49 50 memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); 51 52 __raw_writel(virt_to_phys(secondary_startup), (sys_manager_base_addr+0x10)); 53 54 flush_cache_all(); 55 smp_wmb(); 56 outer_clean_range(0, trampoline_size); 57 58 /* This will release CPU #1 out of reset.*/ 59 __raw_writel(0, rst_manager_base_addr + 0x10); 60 61 return 0; 62 } 63 64 /* 65 * Initialise the CPU possible map early - this describes the CPUs 66 * which may be present or become present in the system. 67 */ 68 static void __init socfpga_smp_init_cpus(void) 69 { 70 unsigned int i, ncores; 71 72 ncores = scu_get_core_count(socfpga_scu_base_addr); 73 74 for (i = 0; i < ncores; i++) 75 set_cpu_possible(i, true); 76 77 /* sanity check */ 78 if (ncores > num_possible_cpus()) { 79 pr_warn("socfpga: no. of cores (%d) greater than configured" 80 "maximum of %d - clipping\n", ncores, num_possible_cpus()); 81 ncores = num_possible_cpus(); 82 } 83 84 for (i = 0; i < ncores; i++) 85 set_cpu_possible(i, true); 86 87 set_smp_cross_call(gic_raise_softirq); 88 } 89 90 static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus) 91 { 92 scu_enable(socfpga_scu_base_addr); 93 } 94 95 /* 96 * platform-specific code to shutdown a CPU 97 * 98 * Called with IRQs disabled 99 */ 100 static void socfpga_cpu_die(unsigned int cpu) 101 { 102 cpu_do_idle(); 103 104 /* We should have never returned from idle */ 105 panic("cpu %d unexpectedly exit from shutdown\n", cpu); 106 } 107 108 struct smp_operations socfpga_smp_ops __initdata = { 109 .smp_init_cpus = socfpga_smp_init_cpus, 110 .smp_prepare_cpus = socfpga_smp_prepare_cpus, 111 .smp_secondary_init = socfpga_secondary_init, 112 .smp_boot_secondary = socfpga_boot_secondary, 113 #ifdef CONFIG_HOTPLUG_CPU 114 .cpu_die = socfpga_cpu_die, 115 #endif 116 }; 117