xref: /linux/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c (revision 9f2c9170934eace462499ba0bfe042cc72900173)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * R-Car Generation 2 da9063(L)/da9210 regulator quirk
4  *
5  * Certain Gen2 development boards have an da9063 and one or more da9210
6  * regulators. All of these regulators have their interrupt request lines
7  * tied to the same interrupt pin (IRQ2) on the SoC.
8  *
9  * After cold boot or da9063-induced restart, both the da9063 and da9210 seem
10  * to assert their interrupt request lines.  Hence as soon as one driver
11  * requests this irq, it gets stuck in an interrupt storm, as it only manages
12  * to deassert its own interrupt request line, and the other driver hasn't
13  * installed an interrupt handler yet.
14  *
15  * To handle this, install a quirk that masks the interrupts in both the
16  * da9063 and da9210.  This quirk has to run after the i2c master driver has
17  * been initialized, but before the i2c slave drivers are initialized.
18  *
19  * Copyright (C) 2015 Glider bvba
20  */
21 
22 #include <linux/device.h>
23 #include <linux/i2c.h>
24 #include <linux/init.h>
25 #include <linux/io.h>
26 #include <linux/list.h>
27 #include <linux/notifier.h>
28 #include <linux/of.h>
29 #include <linux/of_irq.h>
30 #include <linux/mfd/da9063/registers.h>
31 
32 #define IRQC_BASE		0xe61c0000
33 #define IRQC_MONITOR		0x104	/* IRQn Signal Level Monitor Register */
34 
35 #define REGULATOR_IRQ_MASK	BIT(2)	/* IRQ2, active low */
36 
37 /* start of DA9210 System Control and Event Registers */
38 #define DA9210_REG_MASK_A		0x54
39 
40 struct regulator_quirk {
41 	struct list_head		list;
42 	const struct of_device_id	*id;
43 	struct device_node		*np;
44 	struct of_phandle_args		irq_args;
45 	struct i2c_msg			i2c_msg;
46 	bool				shared;	/* IRQ line is shared */
47 };
48 
49 static LIST_HEAD(quirk_list);
50 static void __iomem *irqc;
51 
52 /* first byte sets the memory pointer, following are consecutive reg values */
53 static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
54 static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
55 
56 static struct i2c_msg da9063_msg = {
57 	.len = ARRAY_SIZE(da9063_irq_clr),
58 	.buf = da9063_irq_clr,
59 };
60 
61 static struct i2c_msg da9210_msg = {
62 	.len = ARRAY_SIZE(da9210_irq_clr),
63 	.buf = da9210_irq_clr,
64 };
65 
66 static const struct of_device_id rcar_gen2_quirk_match[] = {
67 	{ .compatible = "dlg,da9063", .data = &da9063_msg },
68 	{ .compatible = "dlg,da9063l", .data = &da9063_msg },
69 	{ .compatible = "dlg,da9210", .data = &da9210_msg },
70 	{ /* sentinel */ }
71 };
72 
73 static int regulator_quirk_notify(struct notifier_block *nb,
74 				  unsigned long action, void *data)
75 {
76 	struct regulator_quirk *pos, *tmp;
77 	struct device *dev = data;
78 	struct i2c_client *client;
79 	static bool done;
80 	int ret;
81 	u32 mon;
82 
83 	if (done)
84 		return 0;
85 
86 	mon = ioread32(irqc + IRQC_MONITOR);
87 	dev_dbg(dev, "%s: %ld, IRQC_MONITOR = 0x%x\n", __func__, action, mon);
88 	if (mon & REGULATOR_IRQ_MASK)
89 		goto remove;
90 
91 	if (action != BUS_NOTIFY_ADD_DEVICE || dev->type == &i2c_adapter_type)
92 		return 0;
93 
94 	client = to_i2c_client(dev);
95 	dev_dbg(dev, "Detected %s\n", client->name);
96 
97 	/*
98 	 * Send message to all PMICs that share an IRQ line to deassert it.
99 	 *
100 	 * WARNING: This works only if all the PMICs are on the same I2C bus.
101 	 */
102 	list_for_each_entry(pos, &quirk_list, list) {
103 		if (!pos->shared)
104 			continue;
105 
106 		if (pos->np->parent != client->dev.parent->of_node)
107 			continue;
108 
109 		dev_info(&client->dev, "clearing %s@0x%02x interrupts\n",
110 			 pos->id->compatible, pos->i2c_msg.addr);
111 
112 		ret = i2c_transfer(client->adapter, &pos->i2c_msg, 1);
113 		if (ret != 1)
114 			dev_err(&client->dev, "i2c error %d\n", ret);
115 	}
116 
117 	mon = ioread32(irqc + IRQC_MONITOR);
118 	if (mon & REGULATOR_IRQ_MASK)
119 		goto remove;
120 
121 	return 0;
122 
123 remove:
124 	dev_info(dev, "IRQ2 is not asserted, removing quirk\n");
125 
126 	list_for_each_entry_safe(pos, tmp, &quirk_list, list) {
127 		list_del(&pos->list);
128 		of_node_put(pos->np);
129 		kfree(pos);
130 	}
131 
132 	done = true;
133 	iounmap(irqc);
134 	return 0;
135 }
136 
137 static struct notifier_block regulator_quirk_nb = {
138 	.notifier_call = regulator_quirk_notify
139 };
140 
141 static int __init rcar_gen2_regulator_quirk(void)
142 {
143 	struct regulator_quirk *quirk, *pos, *tmp;
144 	struct of_phandle_args *argsa, *argsb;
145 	const struct of_device_id *id;
146 	struct device_node *np;
147 	u32 mon, addr;
148 	int ret;
149 
150 	if (!of_machine_is_compatible("renesas,koelsch") &&
151 	    !of_machine_is_compatible("renesas,lager") &&
152 	    !of_machine_is_compatible("renesas,porter") &&
153 	    !of_machine_is_compatible("renesas,stout") &&
154 	    !of_machine_is_compatible("renesas,gose"))
155 		return -ENODEV;
156 
157 	for_each_matching_node_and_match(np, rcar_gen2_quirk_match, &id) {
158 		if (!of_device_is_available(np)) {
159 			of_node_put(np);
160 			break;
161 		}
162 
163 		ret = of_property_read_u32(np, "reg", &addr);
164 		if (ret)	/* Skip invalid entry and continue */
165 			continue;
166 
167 		quirk = kzalloc(sizeof(*quirk), GFP_KERNEL);
168 		if (!quirk) {
169 			ret = -ENOMEM;
170 			of_node_put(np);
171 			goto err_mem;
172 		}
173 
174 		argsa = &quirk->irq_args;
175 		memcpy(&quirk->i2c_msg, id->data, sizeof(quirk->i2c_msg));
176 
177 		quirk->id = id;
178 		quirk->np = of_node_get(np);
179 		quirk->i2c_msg.addr = addr;
180 
181 		ret = of_irq_parse_one(np, 0, argsa);
182 		if (ret) {	/* Skip invalid entry and continue */
183 			of_node_put(np);
184 			kfree(quirk);
185 			continue;
186 		}
187 
188 		list_for_each_entry(pos, &quirk_list, list) {
189 			argsb = &pos->irq_args;
190 
191 			if (argsa->args_count != argsb->args_count)
192 				continue;
193 
194 			ret = memcmp(argsa->args, argsb->args,
195 				     argsa->args_count *
196 				     sizeof(argsa->args[0]));
197 			if (!ret) {
198 				pos->shared = true;
199 				quirk->shared = true;
200 			}
201 		}
202 
203 		list_add_tail(&quirk->list, &quirk_list);
204 	}
205 
206 	irqc = ioremap(IRQC_BASE, PAGE_SIZE);
207 	if (!irqc) {
208 		ret = -ENOMEM;
209 		goto err_mem;
210 	}
211 
212 	mon = ioread32(irqc + IRQC_MONITOR);
213 	if (mon & REGULATOR_IRQ_MASK) {
214 		pr_debug("%s: IRQ2 is not asserted, not installing quirk\n",
215 			 __func__);
216 		ret = 0;
217 		goto err_free;
218 	}
219 
220 	pr_info("IRQ2 is asserted, installing regulator quirk\n");
221 
222 	bus_register_notifier(&i2c_bus_type, &regulator_quirk_nb);
223 	return 0;
224 
225 err_free:
226 	iounmap(irqc);
227 err_mem:
228 	list_for_each_entry_safe(pos, tmp, &quirk_list, list) {
229 		list_del(&pos->list);
230 		of_node_put(pos->np);
231 		kfree(pos);
232 	}
233 
234 	return ret;
235 }
236 
237 arch_initcall(rcar_gen2_regulator_quirk);
238