1/* 2 * Shared SCU setup for mach-shmobile 3 * 4 * Copyright (C) 2012 Bastian Hecht 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22#include <linux/linkage.h> 23#include <linux/init.h> 24#include <asm/memory.h> 25 26/* 27 * Boot code for secondary CPUs. 28 * 29 * First we turn on L1 cache coherency for our CPU. Then we jump to 30 * shmobile_invalidate_start that invalidates the cache and hands over control 31 * to the common ARM startup code. 32 */ 33ENTRY(shmobile_boot_scu) 34 @ r0 = SCU base address 35 mrc p15, 0, r1, c0, c0, 5 @ read MIPDR 36 and r1, r1, #3 @ mask out cpu ID 37 lsl r1, r1, #3 @ we will shift by cpu_id * 8 bits 38 ldr r2, [r0, #8] @ SCU Power Status Register 39 mov r3, #3 40 lsl r3, r3, r1 41 bic r2, r2, r3 @ Clear bits of our CPU (Run Mode) 42 str r2, [r0, #8] @ write back 43 44 b shmobile_invalidate_start 45ENDPROC(shmobile_boot_scu) 46 47 .text 48 .align 2 49 .globl shmobile_scu_base 50shmobile_scu_base: 51 .space 4 52