1 /* 2 * arch/arm/mach-sa1100/include/mach/irqs.h 3 * 4 * Copyright (C) 1996 Russell King 5 * Copyright (C) 1998 Deborah Wallach (updates for SA1100/Brutus). 6 * Copyright (C) 1999 Nicolas Pitre (full GPIO irq isolation) 7 * 8 * 2001/11/14 RMK Cleaned up and standardised a lot of the IRQs. 9 */ 10 11 #define IRQ_GPIO0 0 12 #define IRQ_GPIO1 1 13 #define IRQ_GPIO2 2 14 #define IRQ_GPIO3 3 15 #define IRQ_GPIO4 4 16 #define IRQ_GPIO5 5 17 #define IRQ_GPIO6 6 18 #define IRQ_GPIO7 7 19 #define IRQ_GPIO8 8 20 #define IRQ_GPIO9 9 21 #define IRQ_GPIO10 10 22 #define IRQ_GPIO11_27 11 23 #define IRQ_LCD 12 /* LCD controller */ 24 #define IRQ_Ser0UDC 13 /* Ser. port 0 UDC */ 25 #define IRQ_Ser1SDLC 14 /* Ser. port 1 SDLC */ 26 #define IRQ_Ser1UART 15 /* Ser. port 1 UART */ 27 #define IRQ_Ser2ICP 16 /* Ser. port 2 ICP */ 28 #define IRQ_Ser3UART 17 /* Ser. port 3 UART */ 29 #define IRQ_Ser4MCP 18 /* Ser. port 4 MCP */ 30 #define IRQ_Ser4SSP 19 /* Ser. port 4 SSP */ 31 #define IRQ_DMA0 20 /* DMA controller channel 0 */ 32 #define IRQ_DMA1 21 /* DMA controller channel 1 */ 33 #define IRQ_DMA2 22 /* DMA controller channel 2 */ 34 #define IRQ_DMA3 23 /* DMA controller channel 3 */ 35 #define IRQ_DMA4 24 /* DMA controller channel 4 */ 36 #define IRQ_DMA5 25 /* DMA controller channel 5 */ 37 #define IRQ_OST0 26 /* OS Timer match 0 */ 38 #define IRQ_OST1 27 /* OS Timer match 1 */ 39 #define IRQ_OST2 28 /* OS Timer match 2 */ 40 #define IRQ_OST3 29 /* OS Timer match 3 */ 41 #define IRQ_RTC1Hz 30 /* RTC 1 Hz clock */ 42 #define IRQ_RTCAlrm 31 /* RTC Alarm */ 43 44 #define IRQ_GPIO11 32 45 #define IRQ_GPIO12 33 46 #define IRQ_GPIO13 34 47 #define IRQ_GPIO14 35 48 #define IRQ_GPIO15 36 49 #define IRQ_GPIO16 37 50 #define IRQ_GPIO17 38 51 #define IRQ_GPIO18 39 52 #define IRQ_GPIO19 40 53 #define IRQ_GPIO20 41 54 #define IRQ_GPIO21 42 55 #define IRQ_GPIO22 43 56 #define IRQ_GPIO23 44 57 #define IRQ_GPIO24 45 58 #define IRQ_GPIO25 46 59 #define IRQ_GPIO26 47 60 #define IRQ_GPIO27 48 61 62 /* 63 * The next 16 interrupts are for board specific purposes. Since 64 * the kernel can only run on one machine at a time, we can re-use 65 * these. If you need more, increase IRQ_BOARD_END, but keep it 66 * within sensible limits. IRQs 49 to 64 are available. 67 */ 68 #define IRQ_BOARD_START 49 69 #define IRQ_BOARD_END 65 70 71 /* 72 * Figure out the MAX IRQ number. 73 * 74 * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1. 75 * If we have an LoCoMo, the max IRQ is IRQ_BOARD_START + 4 76 * Otherwise, we have the standard IRQs only. 77 */ 78 #ifdef CONFIG_SA1111 79 #define NR_IRQS (IRQ_BOARD_END + 55) 80 #elif defined(CONFIG_SHARP_LOCOMO) 81 #define NR_IRQS (IRQ_BOARD_START + 4) 82 #else 83 #define NR_IRQS (IRQ_BOARD_START) 84 #endif 85 86 /* 87 * Board specific IRQs. Define them here. 88 * Do not surround them with ifdefs. 89 */ 90 #define IRQ_NEPONSET_SMC9196 (IRQ_BOARD_START + 0) 91 #define IRQ_NEPONSET_USAR (IRQ_BOARD_START + 1) 92 #define IRQ_NEPONSET_SA1111 (IRQ_BOARD_START + 2) 93