1*a09e64fbSRussell King /* 2*a09e64fbSRussell King * arch/arm/mach-sa1100/include/mach/irqs.h 3*a09e64fbSRussell King * 4*a09e64fbSRussell King * Copyright (C) 1996 Russell King 5*a09e64fbSRussell King * Copyright (C) 1998 Deborah Wallach (updates for SA1100/Brutus). 6*a09e64fbSRussell King * Copyright (C) 1999 Nicolas Pitre (full GPIO irq isolation) 7*a09e64fbSRussell King * 8*a09e64fbSRussell King * 2001/11/14 RMK Cleaned up and standardised a lot of the IRQs. 9*a09e64fbSRussell King */ 10*a09e64fbSRussell King 11*a09e64fbSRussell King #define IRQ_GPIO0 0 12*a09e64fbSRussell King #define IRQ_GPIO1 1 13*a09e64fbSRussell King #define IRQ_GPIO2 2 14*a09e64fbSRussell King #define IRQ_GPIO3 3 15*a09e64fbSRussell King #define IRQ_GPIO4 4 16*a09e64fbSRussell King #define IRQ_GPIO5 5 17*a09e64fbSRussell King #define IRQ_GPIO6 6 18*a09e64fbSRussell King #define IRQ_GPIO7 7 19*a09e64fbSRussell King #define IRQ_GPIO8 8 20*a09e64fbSRussell King #define IRQ_GPIO9 9 21*a09e64fbSRussell King #define IRQ_GPIO10 10 22*a09e64fbSRussell King #define IRQ_GPIO11_27 11 23*a09e64fbSRussell King #define IRQ_LCD 12 /* LCD controller */ 24*a09e64fbSRussell King #define IRQ_Ser0UDC 13 /* Ser. port 0 UDC */ 25*a09e64fbSRussell King #define IRQ_Ser1SDLC 14 /* Ser. port 1 SDLC */ 26*a09e64fbSRussell King #define IRQ_Ser1UART 15 /* Ser. port 1 UART */ 27*a09e64fbSRussell King #define IRQ_Ser2ICP 16 /* Ser. port 2 ICP */ 28*a09e64fbSRussell King #define IRQ_Ser3UART 17 /* Ser. port 3 UART */ 29*a09e64fbSRussell King #define IRQ_Ser4MCP 18 /* Ser. port 4 MCP */ 30*a09e64fbSRussell King #define IRQ_Ser4SSP 19 /* Ser. port 4 SSP */ 31*a09e64fbSRussell King #define IRQ_DMA0 20 /* DMA controller channel 0 */ 32*a09e64fbSRussell King #define IRQ_DMA1 21 /* DMA controller channel 1 */ 33*a09e64fbSRussell King #define IRQ_DMA2 22 /* DMA controller channel 2 */ 34*a09e64fbSRussell King #define IRQ_DMA3 23 /* DMA controller channel 3 */ 35*a09e64fbSRussell King #define IRQ_DMA4 24 /* DMA controller channel 4 */ 36*a09e64fbSRussell King #define IRQ_DMA5 25 /* DMA controller channel 5 */ 37*a09e64fbSRussell King #define IRQ_OST0 26 /* OS Timer match 0 */ 38*a09e64fbSRussell King #define IRQ_OST1 27 /* OS Timer match 1 */ 39*a09e64fbSRussell King #define IRQ_OST2 28 /* OS Timer match 2 */ 40*a09e64fbSRussell King #define IRQ_OST3 29 /* OS Timer match 3 */ 41*a09e64fbSRussell King #define IRQ_RTC1Hz 30 /* RTC 1 Hz clock */ 42*a09e64fbSRussell King #define IRQ_RTCAlrm 31 /* RTC Alarm */ 43*a09e64fbSRussell King 44*a09e64fbSRussell King #define IRQ_GPIO11 32 45*a09e64fbSRussell King #define IRQ_GPIO12 33 46*a09e64fbSRussell King #define IRQ_GPIO13 34 47*a09e64fbSRussell King #define IRQ_GPIO14 35 48*a09e64fbSRussell King #define IRQ_GPIO15 36 49*a09e64fbSRussell King #define IRQ_GPIO16 37 50*a09e64fbSRussell King #define IRQ_GPIO17 38 51*a09e64fbSRussell King #define IRQ_GPIO18 39 52*a09e64fbSRussell King #define IRQ_GPIO19 40 53*a09e64fbSRussell King #define IRQ_GPIO20 41 54*a09e64fbSRussell King #define IRQ_GPIO21 42 55*a09e64fbSRussell King #define IRQ_GPIO22 43 56*a09e64fbSRussell King #define IRQ_GPIO23 44 57*a09e64fbSRussell King #define IRQ_GPIO24 45 58*a09e64fbSRussell King #define IRQ_GPIO25 46 59*a09e64fbSRussell King #define IRQ_GPIO26 47 60*a09e64fbSRussell King #define IRQ_GPIO27 48 61*a09e64fbSRussell King 62*a09e64fbSRussell King /* 63*a09e64fbSRussell King * The next 16 interrupts are for board specific purposes. Since 64*a09e64fbSRussell King * the kernel can only run on one machine at a time, we can re-use 65*a09e64fbSRussell King * these. If you need more, increase IRQ_BOARD_END, but keep it 66*a09e64fbSRussell King * within sensible limits. IRQs 49 to 64 are available. 67*a09e64fbSRussell King */ 68*a09e64fbSRussell King #define IRQ_BOARD_START 49 69*a09e64fbSRussell King #define IRQ_BOARD_END 65 70*a09e64fbSRussell King 71*a09e64fbSRussell King #define IRQ_SA1111_START (IRQ_BOARD_END) 72*a09e64fbSRussell King #define IRQ_GPAIN0 (IRQ_BOARD_END + 0) 73*a09e64fbSRussell King #define IRQ_GPAIN1 (IRQ_BOARD_END + 1) 74*a09e64fbSRussell King #define IRQ_GPAIN2 (IRQ_BOARD_END + 2) 75*a09e64fbSRussell King #define IRQ_GPAIN3 (IRQ_BOARD_END + 3) 76*a09e64fbSRussell King #define IRQ_GPBIN0 (IRQ_BOARD_END + 4) 77*a09e64fbSRussell King #define IRQ_GPBIN1 (IRQ_BOARD_END + 5) 78*a09e64fbSRussell King #define IRQ_GPBIN2 (IRQ_BOARD_END + 6) 79*a09e64fbSRussell King #define IRQ_GPBIN3 (IRQ_BOARD_END + 7) 80*a09e64fbSRussell King #define IRQ_GPBIN4 (IRQ_BOARD_END + 8) 81*a09e64fbSRussell King #define IRQ_GPBIN5 (IRQ_BOARD_END + 9) 82*a09e64fbSRussell King #define IRQ_GPCIN0 (IRQ_BOARD_END + 10) 83*a09e64fbSRussell King #define IRQ_GPCIN1 (IRQ_BOARD_END + 11) 84*a09e64fbSRussell King #define IRQ_GPCIN2 (IRQ_BOARD_END + 12) 85*a09e64fbSRussell King #define IRQ_GPCIN3 (IRQ_BOARD_END + 13) 86*a09e64fbSRussell King #define IRQ_GPCIN4 (IRQ_BOARD_END + 14) 87*a09e64fbSRussell King #define IRQ_GPCIN5 (IRQ_BOARD_END + 15) 88*a09e64fbSRussell King #define IRQ_GPCIN6 (IRQ_BOARD_END + 16) 89*a09e64fbSRussell King #define IRQ_GPCIN7 (IRQ_BOARD_END + 17) 90*a09e64fbSRussell King #define IRQ_MSTXINT (IRQ_BOARD_END + 18) 91*a09e64fbSRussell King #define IRQ_MSRXINT (IRQ_BOARD_END + 19) 92*a09e64fbSRussell King #define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) 93*a09e64fbSRussell King #define IRQ_TPTXINT (IRQ_BOARD_END + 21) 94*a09e64fbSRussell King #define IRQ_TPRXINT (IRQ_BOARD_END + 22) 95*a09e64fbSRussell King #define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) 96*a09e64fbSRussell King #define SSPXMTINT (IRQ_BOARD_END + 24) 97*a09e64fbSRussell King #define SSPRCVINT (IRQ_BOARD_END + 25) 98*a09e64fbSRussell King #define SSPROR (IRQ_BOARD_END + 26) 99*a09e64fbSRussell King #define AUDXMTDMADONEA (IRQ_BOARD_END + 32) 100*a09e64fbSRussell King #define AUDRCVDMADONEA (IRQ_BOARD_END + 33) 101*a09e64fbSRussell King #define AUDXMTDMADONEB (IRQ_BOARD_END + 34) 102*a09e64fbSRussell King #define AUDRCVDMADONEB (IRQ_BOARD_END + 35) 103*a09e64fbSRussell King #define AUDTFSR (IRQ_BOARD_END + 36) 104*a09e64fbSRussell King #define AUDRFSR (IRQ_BOARD_END + 37) 105*a09e64fbSRussell King #define AUDTUR (IRQ_BOARD_END + 38) 106*a09e64fbSRussell King #define AUDROR (IRQ_BOARD_END + 39) 107*a09e64fbSRussell King #define AUDDTS (IRQ_BOARD_END + 40) 108*a09e64fbSRussell King #define AUDRDD (IRQ_BOARD_END + 41) 109*a09e64fbSRussell King #define AUDSTO (IRQ_BOARD_END + 42) 110*a09e64fbSRussell King #define IRQ_USBPWR (IRQ_BOARD_END + 43) 111*a09e64fbSRussell King #define IRQ_HCIM (IRQ_BOARD_END + 44) 112*a09e64fbSRussell King #define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45) 113*a09e64fbSRussell King #define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46) 114*a09e64fbSRussell King #define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47) 115*a09e64fbSRussell King #define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48) 116*a09e64fbSRussell King #define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49) 117*a09e64fbSRussell King #define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50) 118*a09e64fbSRussell King #define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51) 119*a09e64fbSRussell King #define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52) 120*a09e64fbSRussell King #define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53) 121*a09e64fbSRussell King #define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54) 122*a09e64fbSRussell King 123*a09e64fbSRussell King #define IRQ_LOCOMO_START (IRQ_BOARD_END) 124*a09e64fbSRussell King #define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0) 125*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1) 126*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2) 127*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3) 128*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4) 129*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5) 130*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6) 131*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7) 132*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8) 133*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9) 134*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10) 135*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11) 136*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12) 137*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13) 138*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14) 139*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15) 140*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16) 141*a09e64fbSRussell King #define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) 142*a09e64fbSRussell King #define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) 143*a09e64fbSRussell King #define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) 144*a09e64fbSRussell King #define IRQ_LOCOMO_SPI_REND (IRQ_BOARD_END + 20) 145*a09e64fbSRussell King #define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) 146*a09e64fbSRussell King 147*a09e64fbSRussell King /* 148*a09e64fbSRussell King * Figure out the MAX IRQ number. 149*a09e64fbSRussell King * 150*a09e64fbSRussell King * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1. 151*a09e64fbSRussell King * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1 152*a09e64fbSRussell King * Otherwise, we have the standard IRQs only. 153*a09e64fbSRussell King */ 154*a09e64fbSRussell King #ifdef CONFIG_SA1111 155*a09e64fbSRussell King #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) 156*a09e64fbSRussell King #elif defined(CONFIG_SA1100_H3800) 157*a09e64fbSRussell King #define NR_IRQS (IRQ_BOARD_END) 158*a09e64fbSRussell King #elif defined(CONFIG_SHARP_LOCOMO) 159*a09e64fbSRussell King #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) 160*a09e64fbSRussell King #else 161*a09e64fbSRussell King #define NR_IRQS (IRQ_BOARD_START) 162*a09e64fbSRussell King #endif 163*a09e64fbSRussell King 164*a09e64fbSRussell King /* 165*a09e64fbSRussell King * Board specific IRQs. Define them here. 166*a09e64fbSRussell King * Do not surround them with ifdefs. 167*a09e64fbSRussell King */ 168*a09e64fbSRussell King #define IRQ_NEPONSET_SMC9196 (IRQ_BOARD_START + 0) 169*a09e64fbSRussell King #define IRQ_NEPONSET_USAR (IRQ_BOARD_START + 1) 170*a09e64fbSRussell King #define IRQ_NEPONSET_SA1111 (IRQ_BOARD_START + 2) 171*a09e64fbSRussell King 172*a09e64fbSRussell King /* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */ 173*a09e64fbSRussell King #define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0) 174*a09e64fbSRussell King #define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) 175*a09e64fbSRussell King #define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) 176*a09e64fbSRussell King #define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) 177*a09e64fbSRussell King 178*a09e64fbSRussell King /* H3800-specific IRQs (CONFIG_SA1100_H3800) */ 179*a09e64fbSRussell King #define H3800_KPIO_IRQ_START (IRQ_BOARD_START) 180*a09e64fbSRussell King #define IRQ_H3800_KEY (IRQ_BOARD_START + 0) 181*a09e64fbSRussell King #define IRQ_H3800_SPI (IRQ_BOARD_START + 1) 182*a09e64fbSRussell King #define IRQ_H3800_OWM (IRQ_BOARD_START + 2) 183*a09e64fbSRussell King #define IRQ_H3800_ADC (IRQ_BOARD_START + 3) 184*a09e64fbSRussell King #define IRQ_H3800_UART_0 (IRQ_BOARD_START + 4) 185*a09e64fbSRussell King #define IRQ_H3800_UART_1 (IRQ_BOARD_START + 5) 186*a09e64fbSRussell King #define IRQ_H3800_TIMER_0 (IRQ_BOARD_START + 6) 187*a09e64fbSRussell King #define IRQ_H3800_TIMER_1 (IRQ_BOARD_START + 7) 188*a09e64fbSRussell King #define IRQ_H3800_TIMER_2 (IRQ_BOARD_START + 8) 189*a09e64fbSRussell King #define H3800_KPIO_IRQ_COUNT 9 190*a09e64fbSRussell King 191*a09e64fbSRussell King #define H3800_GPIO_IRQ_START (IRQ_BOARD_START + 9) 192*a09e64fbSRussell King #define IRQ_H3800_PEN (IRQ_BOARD_START + 9) 193*a09e64fbSRussell King #define IRQ_H3800_SD_DETECT (IRQ_BOARD_START + 10) 194*a09e64fbSRussell King #define IRQ_H3800_EAR_IN (IRQ_BOARD_START + 11) 195*a09e64fbSRussell King #define IRQ_H3800_USB_DETECT (IRQ_BOARD_START + 12) 196*a09e64fbSRussell King #define IRQ_H3800_SD_CON_SLT (IRQ_BOARD_START + 13) 197*a09e64fbSRussell King #define H3800_GPIO_IRQ_COUNT 5 198