1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2a09e64fbSRussell King /* 3a09e64fbSRussell King * arch/arm/mach-sa1100/include/mach/collie.h 4a09e64fbSRussell King * 5beca98c9SPaul Gortmaker * This file contains the hardware specific definitions for Collie 6a09e64fbSRussell King * Only include this file from SA1100-specific files. 7a09e64fbSRussell King * 8a09e64fbSRussell King * ChangeLog: 9a09e64fbSRussell King * 04-06-2001 Lineo Japan, Inc. 10a09e64fbSRussell King * 04-16-2001 SHARP Corporation 11a09e64fbSRussell King * 07-07-2002 Chris Larson <clarson@digi.com> 12a09e64fbSRussell King * 13a09e64fbSRussell King */ 14a09e64fbSRussell King #ifndef __ASM_ARCH_COLLIE_H 15a09e64fbSRussell King #define __ASM_ARCH_COLLIE_H 16a09e64fbSRussell King 17052450fdSLinus Walleij #include "hardware.h" /* Gives GPIO_MAX */ 18052450fdSLinus Walleij 19224be092SDmitry Baryshkov #define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1) 208cb52f78SDmitry Baryshkov #define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0) 21a09e64fbSRussell King #define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12 22a09e64fbSRussell King #define COLLIE_SCP_DIAG_BOOT2 SCOOP_GPCR_PA13 23a09e64fbSRussell King #define COLLIE_SCP_MUTE_L SCOOP_GPCR_PA14 24a09e64fbSRussell King #define COLLIE_SCP_MUTE_R SCOOP_GPCR_PA15 25a09e64fbSRussell King #define COLLIE_SCP_5VON SCOOP_GPCR_PA16 26a09e64fbSRussell King #define COLLIE_SCP_AMP_ON SCOOP_GPCR_PA17 27224be092SDmitry Baryshkov #define COLLIE_GPIO_VPEN (COLLIE_SCOOP_GPIO_BASE + 7) 28a09e64fbSRussell King #define COLLIE_SCP_LB_VOL_CHG SCOOP_GPCR_PA19 29a09e64fbSRussell King 308cb52f78SDmitry Baryshkov #define COLLIE_SCOOP_IO_DIR (COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ 31224be092SDmitry Baryshkov COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON | \ 32a09e64fbSRussell King COLLIE_SCP_LB_VOL_CHG) 338cb52f78SDmitry Baryshkov #define COLLIE_SCOOP_IO_OUT (COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R) 34a09e64fbSRussell King 351d0ad843SThomas Kunze /* GPIOs for gpiolib */ 36a09e64fbSRussell King 371d0ad843SThomas Kunze #define COLLIE_GPIO_ON_KEY (0) 381d0ad843SThomas Kunze #define COLLIE_GPIO_AC_IN (1) 391d0ad843SThomas Kunze #define COLLIE_GPIO_SDIO_INT (11) 401d0ad843SThomas Kunze #define COLLIE_GPIO_CF_IRQ (14) 411d0ad843SThomas Kunze #define COLLIE_GPIO_nREMOCON_INT (15) 421d0ad843SThomas Kunze #define COLLIE_GPIO_UCB1x00_RESET (16) 431d0ad843SThomas Kunze #define COLLIE_GPIO_nMIC_ON (17) 441d0ad843SThomas Kunze #define COLLIE_GPIO_nREMOCON_ON (18) 451d0ad843SThomas Kunze #define COLLIE_GPIO_CO (20) 461d0ad843SThomas Kunze #define COLLIE_GPIO_MCP_CLK (21) 471d0ad843SThomas Kunze #define COLLIE_GPIO_CF_CD (22) 481d0ad843SThomas Kunze #define COLLIE_GPIO_UCB1x00_IRQ (23) 491d0ad843SThomas Kunze #define COLLIE_GPIO_WAKEUP (24) 501d0ad843SThomas Kunze #define COLLIE_GPIO_GA_INT (25) 511d0ad843SThomas Kunze #define COLLIE_GPIO_MAIN_BAT_LOW (26) 52a09e64fbSRussell King 531d0ad843SThomas Kunze /* GPIO definitions for direct register access */ 541d0ad843SThomas Kunze 551d0ad843SThomas Kunze #define _COLLIE_GPIO_ON_KEY GPIO_GPIO(0) 561d0ad843SThomas Kunze #define _COLLIE_GPIO_AC_IN GPIO_GPIO(1) 571d0ad843SThomas Kunze #define _COLLIE_GPIO_nREMOCON_INT GPIO_GPIO(15) 581d0ad843SThomas Kunze #define _COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO(16) 591d0ad843SThomas Kunze #define _COLLIE_GPIO_nMIC_ON GPIO_GPIO(17) 601d0ad843SThomas Kunze #define _COLLIE_GPIO_nREMOCON_ON GPIO_GPIO(18) 611d0ad843SThomas Kunze #define _COLLIE_GPIO_CO GPIO_GPIO(20) 621d0ad843SThomas Kunze #define _COLLIE_GPIO_WAKEUP GPIO_GPIO(24) 63a09e64fbSRussell King /* Interrupts */ 64a09e64fbSRussell King 65a09e64fbSRussell King #define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0 66a09e64fbSRussell King #define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1 67a09e64fbSRussell King #define COLLIE_IRQ_GPIO_SDIO_IRQ IRQ_GPIO11 68a09e64fbSRussell King #define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14 69a09e64fbSRussell King #define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15 70a09e64fbSRussell King #define COLLIE_IRQ_GPIO_CO IRQ_GPIO20 71a09e64fbSRussell King #define COLLIE_IRQ_GPIO_CF_CD IRQ_GPIO22 72a09e64fbSRussell King #define COLLIE_IRQ_GPIO_UCB1x00_IRQ IRQ_GPIO23 73a09e64fbSRussell King #define COLLIE_IRQ_GPIO_WAKEUP IRQ_GPIO24 74a09e64fbSRussell King #define COLLIE_IRQ_GPIO_GA_INT IRQ_GPIO25 75a09e64fbSRussell King #define COLLIE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO26 76a09e64fbSRussell King 77a09e64fbSRussell King /* GPIO's on the TC35143AF (Toshiba Analog Frontend) */ 78f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_BASE (GPIO_MAX + 13) 79f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0 80f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_TBL_CHK UCB_IO_1 81f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_VPEN_ON UCB_IO_2 82287d4d51SDmitry Eremin-Solenikov #define COLLIE_GPIO_IR_ON (COLLIE_TC35143_GPIO_BASE + 3) 83f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_AMP_ON UCB_IO_4 84f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_VERSION1 UCB_IO_5 85f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_FS8KLPF UCB_IO_5 86f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_BUZZER_BIAS UCB_IO_6 87f7177c84SThomas Kunze #define COLLIE_GPIO_MBAT_ON (COLLIE_TC35143_GPIO_BASE + 7) 88f7177c84SThomas Kunze #define COLLIE_GPIO_BBAT_ON (COLLIE_TC35143_GPIO_BASE + 8) 89f7177c84SThomas Kunze #define COLLIE_GPIO_TMP_ON (COLLIE_TC35143_GPIO_BASE + 9) 90a09e64fbSRussell King #define COLLIE_TC35143_GPIO_IN (UCB_IO_0 | UCB_IO_2 | UCB_IO_5) 91f7177c84SThomas Kunze #define COLLIE_TC35143_GPIO_OUT (UCB_IO_1 | UCB_IO_3 | UCB_IO_4 \ 92f7177c84SThomas Kunze | UCB_IO_6) 93a09e64fbSRussell King 94a09e64fbSRussell King #endif 95