1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2a09e64fbSRussell King /* 3a09e64fbSRussell King * arch/arm/mach-sa1100/include/mach/assabet.h 4a09e64fbSRussell King * 52f82af08SNicolas Pitre * Created 2000/06/05 by Nicolas Pitre <nico@fluxnic.net> 6a09e64fbSRussell King * 7a09e64fbSRussell King * This file contains the hardware specific definitions for Assabet 8a09e64fbSRussell King * Only include this file from SA1100-specific files. 9a09e64fbSRussell King * 10a09e64fbSRussell King * 2000/05/23 John Dorsey <john+@cs.cmu.edu> 11a09e64fbSRussell King * Definitions for Neponset added. 12a09e64fbSRussell King */ 13a09e64fbSRussell King #ifndef __ASM_ARCH_ASSABET_H 14a09e64fbSRussell King #define __ASM_ARCH_ASSABET_H 15a09e64fbSRussell King 16a09e64fbSRussell King 17a09e64fbSRussell King /* System Configuration Register flags */ 18a09e64fbSRussell King 19a09e64fbSRussell King #define ASSABET_SCR_SDRAM_LOW (1<<2) /* SDRAM size (low bit) */ 20a09e64fbSRussell King #define ASSABET_SCR_SDRAM_HIGH (1<<3) /* SDRAM size (high bit) */ 21a09e64fbSRussell King #define ASSABET_SCR_FLASH_LOW (1<<4) /* Flash size (low bit) */ 22a09e64fbSRussell King #define ASSABET_SCR_FLASH_HIGH (1<<5) /* Flash size (high bit) */ 23a09e64fbSRussell King #define ASSABET_SCR_GFX (1<<8) /* Graphics Accelerator (0 = present) */ 24a09e64fbSRussell King #define ASSABET_SCR_SA1111 (1<<9) /* Neponset (0 = present) */ 25a09e64fbSRussell King 26a09e64fbSRussell King #define ASSABET_SCR_INIT -1 27a09e64fbSRussell King 28a09e64fbSRussell King extern unsigned long SCR_value; 29a09e64fbSRussell King 30a09e64fbSRussell King #ifdef CONFIG_ASSABET_NEPONSET 31a09e64fbSRussell King #define machine_has_neponset() ((SCR_value & ASSABET_SCR_SA1111) == 0) 32a09e64fbSRussell King #else 33a09e64fbSRussell King #define machine_has_neponset() (0) 34a09e64fbSRussell King #endif 35a09e64fbSRussell King 36a09e64fbSRussell King /* Board Control Register */ 37a09e64fbSRussell King 38a09e64fbSRussell King #define ASSABET_BCR_BASE 0xf1000000 39a09e64fbSRussell King #define ASSABET_BCR (*(volatile unsigned int *)(ASSABET_BCR_BASE)) 40a09e64fbSRussell King 41a09e64fbSRussell King #define ASSABET_BCR_CF_PWR (1<<0) /* Compact Flash Power (1 = 3.3v, 0 = off) */ 42a09e64fbSRussell King #define ASSABET_BCR_CF_RST (1<<1) /* Compact Flash Reset (1 = power up reset) */ 437dde0c03SRussell King #define ASSABET_BCR_NGFX_RST (1<<1) /* Graphics Accelerator Reset (0 = hold reset) */ 447dde0c03SRussell King #define ASSABET_BCR_NCODEC_RST (1<<2) /* 0 = Holds UCB1300, ADI7171, and UDA1341 in reset */ 45a09e64fbSRussell King #define ASSABET_BCR_IRDA_FSEL (1<<3) /* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */ 46a09e64fbSRussell King #define ASSABET_BCR_IRDA_MD0 (1<<4) /* Range/Power select */ 47a09e64fbSRussell King #define ASSABET_BCR_IRDA_MD1 (1<<5) /* Range/Power select */ 48a09e64fbSRussell King #define ASSABET_BCR_STEREO_LB (1<<6) /* Stereo Loopback */ 49a09e64fbSRussell King #define ASSABET_BCR_CF_BUS_OFF (1<<7) /* Compact Flash bus (0 = on, 1 = off (float)) */ 50a09e64fbSRussell King #define ASSABET_BCR_AUDIO_ON (1<<8) /* Audio power on */ 51a09e64fbSRussell King #define ASSABET_BCR_LIGHT_ON (1<<9) /* Backlight */ 52a09e64fbSRussell King #define ASSABET_BCR_LCD_12RGB (1<<10) /* 0 = 16RGB, 1 = 12RGB */ 53a09e64fbSRussell King #define ASSABET_BCR_LCD_ON (1<<11) /* LCD power on */ 54a09e64fbSRussell King #define ASSABET_BCR_RS232EN (1<<12) /* RS232 transceiver enable */ 55a09e64fbSRussell King #define ASSABET_BCR_LED_RED (1<<13) /* D9 (0 = on, 1 = off) */ 56a09e64fbSRussell King #define ASSABET_BCR_LED_GREEN (1<<14) /* D8 (0 = on, 1 = off) */ 57a09e64fbSRussell King #define ASSABET_BCR_VIB_ON (1<<15) /* Vibration motor (quiet alert) */ 58a09e64fbSRussell King #define ASSABET_BCR_COM_DTR (1<<16) /* COMport Data Terminal Ready */ 59a09e64fbSRussell King #define ASSABET_BCR_COM_RTS (1<<17) /* COMport Request To Send */ 60a09e64fbSRussell King #define ASSABET_BCR_RAD_WU (1<<18) /* Radio wake up interrupt */ 61a09e64fbSRussell King #define ASSABET_BCR_SMB_EN (1<<19) /* System management bus enable */ 62a09e64fbSRussell King #define ASSABET_BCR_TV_IR_DEC (1<<20) /* TV IR Decode Enable (not implemented) */ 63a09e64fbSRussell King #define ASSABET_BCR_QMUTE (1<<21) /* Quick Mute */ 64a09e64fbSRussell King #define ASSABET_BCR_RAD_ON (1<<22) /* Radio Power On */ 65a09e64fbSRussell King #define ASSABET_BCR_SPK_OFF (1<<23) /* 1 = Speaker amplifier power off */ 66a09e64fbSRussell King 67a09e64fbSRussell King #ifdef CONFIG_SA1100_ASSABET 68a09e64fbSRussell King extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set); 69a09e64fbSRussell King #else 70a09e64fbSRussell King #define ASSABET_BCR_frob(x,y) do { } while (0) 71a09e64fbSRussell King #endif 72a09e64fbSRussell King 737dde0c03SRussell King extern void assabet_uda1341_reset(int set); 747dde0c03SRussell King 75a09e64fbSRussell King #define ASSABET_BCR_set(x) ASSABET_BCR_frob((x), (x)) 76a09e64fbSRussell King #define ASSABET_BCR_clear(x) ASSABET_BCR_frob((x), 0) 77a09e64fbSRussell King 78a09e64fbSRussell King #define ASSABET_BSR_BASE 0xf1000000 79a09e64fbSRussell King #define ASSABET_BSR (*(volatile unsigned int*)(ASSABET_BSR_BASE)) 80a09e64fbSRussell King 81a09e64fbSRussell King #define ASSABET_BSR_RS232_VALID (1 << 24) 82a09e64fbSRussell King #define ASSABET_BSR_COM_DCD (1 << 25) 83a09e64fbSRussell King #define ASSABET_BSR_COM_CTS (1 << 26) 84a09e64fbSRussell King #define ASSABET_BSR_COM_DSR (1 << 27) 85a09e64fbSRussell King #define ASSABET_BSR_RAD_CTS (1 << 28) 86a09e64fbSRussell King #define ASSABET_BSR_RAD_DSR (1 << 29) 87a09e64fbSRussell King #define ASSABET_BSR_RAD_DCD (1 << 30) 88a09e64fbSRussell King #define ASSABET_BSR_RAD_RI (1 << 31) 89a09e64fbSRussell King 90a09e64fbSRussell King 9103e0092cSRussell King /* GPIOs (bitmasks) for which the generic definition doesn't say much */ 92a09e64fbSRussell King #define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ 93a09e64fbSRussell King #define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ 94a09e64fbSRussell King #define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ 95a09e64fbSRussell King #define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ 96a09e64fbSRussell King #define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ 97a09e64fbSRussell King #define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ 98a09e64fbSRussell King 9903e0092cSRussell King /* These are gpiolib GPIO numbers, not bitmasks */ 10003e0092cSRussell King #define ASSABET_GPIO_CF_IRQ 21 /* CF IRQ */ 10103e0092cSRussell King #define ASSABET_GPIO_CF_CD 22 /* CF CD */ 10203e0092cSRussell King #define ASSABET_GPIO_CF_BVD2 24 /* CF BVD / IOSPKR */ 10303e0092cSRussell King #define ASSABET_GPIO_CF_BVD1 25 /* CF BVD / IOSTSCHG */ 104a09e64fbSRussell King 105a09e64fbSRussell King #endif 106