1 /* 2 * Hardware definitions for Compaq iPAQ H3xxx Handheld Computers 3 * 4 * Copyright 2000,1 Compaq Computer Corporation. 5 * 6 * Use consistent with the GNU GPL is permitted, 7 * provided that this copyright notice is 8 * preserved in its entirety in all copies and derived works. 9 * 10 * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, 11 * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS 12 * FITNESS FOR ANY PARTICULAR PURPOSE. 13 * 14 * Author: Jamey Hicks. 15 * 16 * History: 17 * 18 * 2001-10-?? Andrew Christian Added support for iPAQ H3800 19 * and abstracted EGPIO interface. 20 * 21 */ 22 #include <linux/config.h> 23 #include <linux/module.h> 24 #include <linux/init.h> 25 #include <linux/kernel.h> 26 #include <linux/tty.h> 27 #include <linux/pm.h> 28 #include <linux/device.h> 29 #include <linux/mtd/mtd.h> 30 #include <linux/mtd/partitions.h> 31 #include <linux/serial_core.h> 32 33 #include <asm/irq.h> 34 #include <asm/hardware.h> 35 #include <asm/mach-types.h> 36 #include <asm/setup.h> 37 38 #include <asm/mach/irq.h> 39 #include <asm/mach/arch.h> 40 #include <asm/mach/flash.h> 41 #include <asm/mach/irda.h> 42 #include <asm/mach/map.h> 43 #include <asm/mach/serial_sa1100.h> 44 45 #include <asm/arch/h3600.h> 46 47 #if defined (CONFIG_SA1100_H3600) || defined (CONFIG_SA1100_H3100) 48 #include <asm/arch/h3600_gpio.h> 49 #endif 50 51 #ifdef CONFIG_SA1100_H3800 52 #include <asm/arch/h3600_asic.h> 53 #endif 54 55 #include "generic.h" 56 57 struct ipaq_model_ops ipaq_model_ops; 58 EXPORT_SYMBOL(ipaq_model_ops); 59 60 static struct mtd_partition h3xxx_partitions[] = { 61 { 62 .name = "H3XXX boot firmware", 63 .size = 0x00040000, 64 .offset = 0, 65 .mask_flags = MTD_WRITEABLE, /* force read-only */ 66 }, { 67 #ifdef CONFIG_MTD_2PARTS_IPAQ 68 .name = "H3XXX root jffs2", 69 .size = MTDPART_SIZ_FULL, 70 .offset = 0x00040000, 71 #else 72 .name = "H3XXX kernel", 73 .size = 0x00080000, 74 .offset = 0x00040000, 75 }, { 76 .name = "H3XXX params", 77 .size = 0x00040000, 78 .offset = 0x000C0000, 79 }, { 80 #ifdef CONFIG_JFFS2_FS 81 .name = "H3XXX root jffs2", 82 .size = MTDPART_SIZ_FULL, 83 .offset = 0x00100000, 84 #else 85 .name = "H3XXX initrd", 86 .size = 0x00100000, 87 .offset = 0x00100000, 88 }, { 89 .name = "H3XXX root cramfs", 90 .size = 0x00300000, 91 .offset = 0x00200000, 92 }, { 93 .name = "H3XXX usr cramfs", 94 .size = 0x00800000, 95 .offset = 0x00500000, 96 }, { 97 .name = "H3XXX usr local", 98 .size = MTDPART_SIZ_FULL, 99 .offset = 0x00d00000, 100 #endif 101 #endif 102 } 103 }; 104 105 static void h3xxx_set_vpp(int vpp) 106 { 107 assign_h3600_egpio(IPAQ_EGPIO_VPP_ON, vpp); 108 } 109 110 static struct flash_platform_data h3xxx_flash_data = { 111 .map_name = "cfi_probe", 112 .set_vpp = h3xxx_set_vpp, 113 .parts = h3xxx_partitions, 114 .nr_parts = ARRAY_SIZE(h3xxx_partitions), 115 }; 116 117 static struct resource h3xxx_flash_resource = { 118 .start = SA1100_CS0_PHYS, 119 .end = SA1100_CS0_PHYS + SZ_32M - 1, 120 .flags = IORESOURCE_MEM, 121 }; 122 123 /* 124 * This turns the IRDA power on or off on the Compaq H3600 125 */ 126 static int h3600_irda_set_power(struct device *dev, unsigned int state) 127 { 128 assign_h3600_egpio( IPAQ_EGPIO_IR_ON, state ); 129 130 return 0; 131 } 132 133 static void h3600_irda_set_speed(struct device *dev, unsigned int speed) 134 { 135 if (speed < 4000000) { 136 clr_h3600_egpio(IPAQ_EGPIO_IR_FSEL); 137 } else { 138 set_h3600_egpio(IPAQ_EGPIO_IR_FSEL); 139 } 140 } 141 142 static struct irda_platform_data h3600_irda_data = { 143 .set_power = h3600_irda_set_power, 144 .set_speed = h3600_irda_set_speed, 145 }; 146 147 static void h3xxx_mach_init(void) 148 { 149 sa11x0_set_flash_data(&h3xxx_flash_data, &h3xxx_flash_resource, 1); 150 sa11x0_set_irda_data(&h3600_irda_data); 151 } 152 153 /* 154 * low-level UART features 155 */ 156 157 static void h3600_uart_set_mctrl(struct uart_port *port, u_int mctrl) 158 { 159 if (port->mapbase == _Ser3UTCR0) { 160 if (mctrl & TIOCM_RTS) 161 GPCR = GPIO_H3600_COM_RTS; 162 else 163 GPSR = GPIO_H3600_COM_RTS; 164 } 165 } 166 167 static u_int h3600_uart_get_mctrl(struct uart_port *port) 168 { 169 u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; 170 171 if (port->mapbase == _Ser3UTCR0) { 172 int gplr = GPLR; 173 /* DCD and CTS bits are inverted in GPLR by RS232 transceiver */ 174 if (gplr & GPIO_H3600_COM_DCD) 175 ret &= ~TIOCM_CD; 176 if (gplr & GPIO_H3600_COM_CTS) 177 ret &= ~TIOCM_CTS; 178 } 179 180 return ret; 181 } 182 183 static void h3600_uart_pm(struct uart_port *port, u_int state, u_int oldstate) 184 { 185 if (port->mapbase == _Ser2UTCR0) { /* TODO: REMOVE THIS */ 186 assign_h3600_egpio(IPAQ_EGPIO_IR_ON, !state); 187 } else if (port->mapbase == _Ser3UTCR0) { 188 assign_h3600_egpio(IPAQ_EGPIO_RS232_ON, !state); 189 } 190 } 191 192 /* 193 * Enable/Disable wake up events for this serial port. 194 * Obviously, we only support this on the normal COM port. 195 */ 196 static int h3600_uart_set_wake(struct uart_port *port, u_int enable) 197 { 198 int err = -EINVAL; 199 200 if (port->mapbase == _Ser3UTCR0) { 201 if (enable) 202 PWER |= PWER_GPIO23 | PWER_GPIO25; /* DCD and CTS */ 203 else 204 PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */ 205 err = 0; 206 } 207 return err; 208 } 209 210 static struct sa1100_port_fns h3600_port_fns __initdata = { 211 .set_mctrl = h3600_uart_set_mctrl, 212 .get_mctrl = h3600_uart_get_mctrl, 213 .pm = h3600_uart_pm, 214 .set_wake = h3600_uart_set_wake, 215 }; 216 217 /* 218 * helper for sa1100fb 219 */ 220 static void h3xxx_lcd_power(int enable) 221 { 222 assign_h3600_egpio(IPAQ_EGPIO_LCD_POWER, enable); 223 } 224 225 static struct map_desc h3600_io_desc[] __initdata = { 226 /* virtual physical length type */ 227 { H3600_BANK_2_VIRT, SA1100_CS2_PHYS, 0x02800000, MT_DEVICE }, /* static memory bank 2 CS#2 */ 228 { H3600_BANK_4_VIRT, SA1100_CS4_PHYS, 0x00800000, MT_DEVICE }, /* static memory bank 4 CS#4 */ 229 { H3600_EGPIO_VIRT, H3600_EGPIO_PHYS, 0x01000000, MT_DEVICE }, /* EGPIO 0 CS#5 */ 230 }; 231 232 /* 233 * Common map_io initialization 234 */ 235 236 static void __init h3xxx_map_io(void) 237 { 238 sa1100_map_io(); 239 iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc)); 240 241 sa1100_register_uart_fns(&h3600_port_fns); 242 sa1100_register_uart(0, 3); /* Common serial port */ 243 // sa1100_register_uart(1, 1); /* Microcontroller on 3100/3600 */ 244 245 /* Ensure those pins are outputs and driving low */ 246 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; 247 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 248 249 /* Configure suspend conditions */ 250 PGSR = 0; 251 PWER = PWER_GPIO0 | PWER_RTC; 252 PCFR = PCFR_OPDE; 253 PSDR = 0; 254 255 sa1100fb_lcd_power = h3xxx_lcd_power; 256 } 257 258 static __inline__ void do_blank(int setp) 259 { 260 if (ipaq_model_ops.blank_callback) 261 ipaq_model_ops.blank_callback(1-setp); 262 } 263 264 /************************* H3100 *************************/ 265 266 #ifdef CONFIG_SA1100_H3100 267 268 #define H3100_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT) 269 static unsigned int h3100_egpio = 0; 270 271 static void h3100_control_egpio(enum ipaq_egpio_type x, int setp) 272 { 273 unsigned int egpio = 0; 274 long gpio = 0; 275 unsigned long flags; 276 277 switch (x) { 278 case IPAQ_EGPIO_LCD_POWER: 279 egpio |= EGPIO_H3600_LCD_ON; 280 gpio |= GPIO_H3100_LCD_3V_ON; 281 do_blank(setp); 282 break; 283 case IPAQ_EGPIO_LCD_ENABLE: 284 break; 285 case IPAQ_EGPIO_CODEC_NRESET: 286 egpio |= EGPIO_H3600_CODEC_NRESET; 287 break; 288 case IPAQ_EGPIO_AUDIO_ON: 289 gpio |= GPIO_H3100_AUD_PWR_ON 290 | GPIO_H3100_AUD_ON; 291 break; 292 case IPAQ_EGPIO_QMUTE: 293 gpio |= GPIO_H3100_QMUTE; 294 break; 295 case IPAQ_EGPIO_OPT_NVRAM_ON: 296 egpio |= EGPIO_H3600_OPT_NVRAM_ON; 297 break; 298 case IPAQ_EGPIO_OPT_ON: 299 egpio |= EGPIO_H3600_OPT_ON; 300 break; 301 case IPAQ_EGPIO_CARD_RESET: 302 egpio |= EGPIO_H3600_CARD_RESET; 303 break; 304 case IPAQ_EGPIO_OPT_RESET: 305 egpio |= EGPIO_H3600_OPT_RESET; 306 break; 307 case IPAQ_EGPIO_IR_ON: 308 gpio |= GPIO_H3100_IR_ON; 309 break; 310 case IPAQ_EGPIO_IR_FSEL: 311 gpio |= GPIO_H3100_IR_FSEL; 312 break; 313 case IPAQ_EGPIO_RS232_ON: 314 egpio |= EGPIO_H3600_RS232_ON; 315 break; 316 case IPAQ_EGPIO_VPP_ON: 317 egpio |= EGPIO_H3600_VPP_ON; 318 break; 319 } 320 321 if (egpio || gpio) { 322 local_irq_save(flags); 323 if (setp) { 324 h3100_egpio |= egpio; 325 GPSR = gpio; 326 } else { 327 h3100_egpio &= ~egpio; 328 GPCR = gpio; 329 } 330 H3100_EGPIO = h3100_egpio; 331 local_irq_restore(flags); 332 } 333 } 334 335 static unsigned long h3100_read_egpio(void) 336 { 337 return h3100_egpio; 338 } 339 340 static int h3100_pm_callback(int req) 341 { 342 if (ipaq_model_ops.pm_callback_aux) 343 return ipaq_model_ops.pm_callback_aux(req); 344 return 0; 345 } 346 347 static struct ipaq_model_ops h3100_model_ops __initdata = { 348 .generic_name = "3100", 349 .control = h3100_control_egpio, 350 .read = h3100_read_egpio, 351 .pm_callback = h3100_pm_callback 352 }; 353 354 #define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON \ 355 | GPIO_H3100_GPIO3 \ 356 | GPIO_H3100_QMUTE \ 357 | GPIO_H3100_LCD_3V_ON \ 358 | GPIO_H3100_AUD_ON \ 359 | GPIO_H3100_AUD_PWR_ON \ 360 | GPIO_H3100_IR_ON \ 361 | GPIO_H3100_IR_FSEL) 362 363 static void __init h3100_map_io(void) 364 { 365 h3xxx_map_io(); 366 367 /* Initialize h3100-specific values here */ 368 GPCR = 0x0fffffff; /* All outputs are set low by default */ 369 GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | 370 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | 371 GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 | 372 H3100_DIRECT_EGPIO; 373 374 /* Older bootldrs put GPIO2-9 in alternate mode on the 375 assumption that they are used for video */ 376 GAFR &= ~H3100_DIRECT_EGPIO; 377 378 H3100_EGPIO = h3100_egpio; 379 ipaq_model_ops = h3100_model_ops; 380 } 381 382 MACHINE_START(H3100, "Compaq iPAQ H3100") 383 .phys_ram = 0xc0000000, 384 .phys_io = 0x80000000, 385 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, 386 .boot_params = 0xc0000100, 387 .map_io = h3100_map_io, 388 .init_irq = sa1100_init_irq, 389 .timer = &sa1100_timer, 390 .init_machine = h3xxx_mach_init, 391 MACHINE_END 392 393 #endif /* CONFIG_SA1100_H3100 */ 394 395 /************************* H3600 *************************/ 396 397 #ifdef CONFIG_SA1100_H3600 398 399 #define H3600_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT) 400 static unsigned int h3600_egpio = EGPIO_H3600_RS232_ON; 401 402 static void h3600_control_egpio(enum ipaq_egpio_type x, int setp) 403 { 404 unsigned int egpio = 0; 405 unsigned long flags; 406 407 switch (x) { 408 case IPAQ_EGPIO_LCD_POWER: 409 egpio |= EGPIO_H3600_LCD_ON | 410 EGPIO_H3600_LCD_PCI | 411 EGPIO_H3600_LCD_5V_ON | 412 EGPIO_H3600_LVDD_ON; 413 do_blank(setp); 414 break; 415 case IPAQ_EGPIO_LCD_ENABLE: 416 break; 417 case IPAQ_EGPIO_CODEC_NRESET: 418 egpio |= EGPIO_H3600_CODEC_NRESET; 419 break; 420 case IPAQ_EGPIO_AUDIO_ON: 421 egpio |= EGPIO_H3600_AUD_AMP_ON | 422 EGPIO_H3600_AUD_PWR_ON; 423 break; 424 case IPAQ_EGPIO_QMUTE: 425 egpio |= EGPIO_H3600_QMUTE; 426 break; 427 case IPAQ_EGPIO_OPT_NVRAM_ON: 428 egpio |= EGPIO_H3600_OPT_NVRAM_ON; 429 break; 430 case IPAQ_EGPIO_OPT_ON: 431 egpio |= EGPIO_H3600_OPT_ON; 432 break; 433 case IPAQ_EGPIO_CARD_RESET: 434 egpio |= EGPIO_H3600_CARD_RESET; 435 break; 436 case IPAQ_EGPIO_OPT_RESET: 437 egpio |= EGPIO_H3600_OPT_RESET; 438 break; 439 case IPAQ_EGPIO_IR_ON: 440 egpio |= EGPIO_H3600_IR_ON; 441 break; 442 case IPAQ_EGPIO_IR_FSEL: 443 egpio |= EGPIO_H3600_IR_FSEL; 444 break; 445 case IPAQ_EGPIO_RS232_ON: 446 egpio |= EGPIO_H3600_RS232_ON; 447 break; 448 case IPAQ_EGPIO_VPP_ON: 449 egpio |= EGPIO_H3600_VPP_ON; 450 break; 451 } 452 453 if (egpio) { 454 local_irq_save(flags); 455 if (setp) 456 h3600_egpio |= egpio; 457 else 458 h3600_egpio &= ~egpio; 459 H3600_EGPIO = h3600_egpio; 460 local_irq_restore(flags); 461 } 462 } 463 464 static unsigned long h3600_read_egpio(void) 465 { 466 return h3600_egpio; 467 } 468 469 static int h3600_pm_callback(int req) 470 { 471 if (ipaq_model_ops.pm_callback_aux) 472 return ipaq_model_ops.pm_callback_aux(req); 473 return 0; 474 } 475 476 static struct ipaq_model_ops h3600_model_ops __initdata = { 477 .generic_name = "3600", 478 .control = h3600_control_egpio, 479 .read = h3600_read_egpio, 480 .pm_callback = h3600_pm_callback 481 }; 482 483 static void __init h3600_map_io(void) 484 { 485 h3xxx_map_io(); 486 487 /* Initialize h3600-specific values here */ 488 489 GPCR = 0x0fffffff; /* All outputs are set low by default */ 490 GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | 491 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | 492 GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 | 493 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | 494 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; 495 496 H3600_EGPIO = h3600_egpio; /* Maintains across sleep? */ 497 ipaq_model_ops = h3600_model_ops; 498 } 499 500 MACHINE_START(H3600, "Compaq iPAQ H3600") 501 .phys_ram = 0xc0000000, 502 .phys_io = 0x80000000, 503 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, 504 .boot_params = 0xc0000100, 505 .map_io = h3600_map_io, 506 .init_irq = sa1100_init_irq, 507 .timer = &sa1100_timer, 508 .init_machine = h3xxx_mach_init, 509 MACHINE_END 510 511 #endif /* CONFIG_SA1100_H3600 */ 512 513 #ifdef CONFIG_SA1100_H3800 514 515 #define SET_ASIC1(x) \ 516 do {if (setp) { H3800_ASIC1_GPIO_OUT |= (x); } else { H3800_ASIC1_GPIO_OUT &= ~(x); }} while(0) 517 518 #define SET_ASIC2(x) \ 519 do {if (setp) { H3800_ASIC2_GPIOPIOD |= (x); } else { H3800_ASIC2_GPIOPIOD &= ~(x); }} while(0) 520 521 #define CLEAR_ASIC1(x) \ 522 do {if (setp) { H3800_ASIC1_GPIO_OUT &= ~(x); } else { H3800_ASIC1_GPIO_OUT |= (x); }} while(0) 523 524 #define CLEAR_ASIC2(x) \ 525 do {if (setp) { H3800_ASIC2_GPIOPIOD &= ~(x); } else { H3800_ASIC2_GPIOPIOD |= (x); }} while(0) 526 527 528 /* 529 On screen enable, we get 530 531 h3800_video_power_on(1) 532 LCD controller starts 533 h3800_video_lcd_enable(1) 534 535 On screen disable, we get 536 537 h3800_video_lcd_enable(0) 538 LCD controller stops 539 h3800_video_power_on(0) 540 */ 541 542 543 static void h3800_video_power_on(int setp) 544 { 545 if (setp) { 546 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_ON; 547 msleep(30); 548 H3800_ASIC1_GPIO_OUT |= GPIO1_VGL_ON; 549 msleep(5); 550 H3800_ASIC1_GPIO_OUT |= GPIO1_VGH_ON; 551 msleep(50); 552 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_5V_ON; 553 msleep(5); 554 } else { 555 msleep(5); 556 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_5V_ON; 557 msleep(50); 558 H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGL_ON; 559 msleep(5); 560 H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGH_ON; 561 msleep(100); 562 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_ON; 563 } 564 } 565 566 static void h3800_video_lcd_enable(int setp) 567 { 568 if (setp) { 569 msleep(17); // Wait one from before turning on 570 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_PCI; 571 } else { 572 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_PCI; 573 msleep(30); // Wait before turning off 574 } 575 } 576 577 578 static void h3800_control_egpio(enum ipaq_egpio_type x, int setp) 579 { 580 switch (x) { 581 case IPAQ_EGPIO_LCD_POWER: 582 h3800_video_power_on(setp); 583 break; 584 case IPAQ_EGPIO_LCD_ENABLE: 585 h3800_video_lcd_enable(setp); 586 break; 587 case IPAQ_EGPIO_CODEC_NRESET: 588 case IPAQ_EGPIO_AUDIO_ON: 589 case IPAQ_EGPIO_QMUTE: 590 printk("%s: error - should not be called\n", __FUNCTION__); 591 break; 592 case IPAQ_EGPIO_OPT_NVRAM_ON: 593 SET_ASIC2(GPIO2_OPT_ON_NVRAM); 594 break; 595 case IPAQ_EGPIO_OPT_ON: 596 SET_ASIC2(GPIO2_OPT_ON); 597 break; 598 case IPAQ_EGPIO_CARD_RESET: 599 SET_ASIC2(GPIO2_OPT_PCM_RESET); 600 break; 601 case IPAQ_EGPIO_OPT_RESET: 602 SET_ASIC2(GPIO2_OPT_RESET); 603 break; 604 case IPAQ_EGPIO_IR_ON: 605 CLEAR_ASIC1(GPIO1_IR_ON_N); 606 break; 607 case IPAQ_EGPIO_IR_FSEL: 608 break; 609 case IPAQ_EGPIO_RS232_ON: 610 SET_ASIC1(GPIO1_RS232_ON); 611 break; 612 case IPAQ_EGPIO_VPP_ON: 613 H3800_ASIC2_FlashWP_VPP_ON = setp; 614 break; 615 } 616 } 617 618 static unsigned long h3800_read_egpio(void) 619 { 620 return H3800_ASIC1_GPIO_OUT | (H3800_ASIC2_GPIOPIOD << 16); 621 } 622 623 /* We need to fix ASIC2 GPIO over suspend/resume. At the moment, 624 it doesn't appear that ASIC1 GPIO has the same problem */ 625 626 static int h3800_pm_callback(int req) 627 { 628 static u16 asic1_data; 629 static u16 asic2_data; 630 int result = 0; 631 632 printk("%s %d\n", __FUNCTION__, req); 633 634 switch (req) { 635 case PM_RESUME: 636 MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; /* Set MSC2 correctly */ 637 638 H3800_ASIC2_GPIOPIOD = asic2_data; 639 H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ 640 | GPIO2_SD_DETECT 641 | GPIO2_EAR_IN_N 642 | GPIO2_USB_DETECT_N 643 | GPIO2_SD_CON_SLT; 644 645 H3800_ASIC1_GPIO_OUT = asic1_data; 646 647 if (ipaq_model_ops.pm_callback_aux) 648 result = ipaq_model_ops.pm_callback_aux(req); 649 break; 650 651 case PM_SUSPEND: 652 if (ipaq_model_ops.pm_callback_aux && 653 ((result = ipaq_model_ops.pm_callback_aux(req)) != 0)) 654 return result; 655 656 asic1_data = H3800_ASIC1_GPIO_OUT; 657 asic2_data = H3800_ASIC2_GPIOPIOD; 658 break; 659 default: 660 printk("%s: unrecognized PM callback\n", __FUNCTION__); 661 break; 662 } 663 return result; 664 } 665 666 static struct ipaq_model_ops h3800_model_ops __initdata = { 667 .generic_name = "3800", 668 .control = h3800_control_egpio, 669 .read = h3800_read_egpio, 670 .pm_callback = h3800_pm_callback 671 }; 672 673 #define MAX_ASIC_ISR_LOOPS 20 674 675 /* The order of these is important - see #include <asm/arch/irqs.h> */ 676 static u32 kpio_irq_mask[] = { 677 KPIO_KEY_ALL, 678 KPIO_SPI_INT, 679 KPIO_OWM_INT, 680 KPIO_ADC_INT, 681 KPIO_UART_0_INT, 682 KPIO_UART_1_INT, 683 KPIO_TIMER_0_INT, 684 KPIO_TIMER_1_INT, 685 KPIO_TIMER_2_INT 686 }; 687 688 static u32 gpio_irq_mask[] = { 689 GPIO2_PEN_IRQ, 690 GPIO2_SD_DETECT, 691 GPIO2_EAR_IN_N, 692 GPIO2_USB_DETECT_N, 693 GPIO2_SD_CON_SLT, 694 }; 695 696 static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) 697 { 698 int i; 699 700 if (0) printk("%s: interrupt received\n", __FUNCTION__); 701 702 desc->chip->ack(irq); 703 704 for (i = 0; i < MAX_ASIC_ISR_LOOPS && (GPLR & GPIO_H3800_ASIC); i++) { 705 u32 irq; 706 int j; 707 708 /* KPIO */ 709 irq = H3800_ASIC2_KPIINTFLAG; 710 if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq); 711 for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++) 712 if (irq & kpio_irq_mask[j]) 713 do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j, regs); 714 715 /* GPIO2 */ 716 irq = H3800_ASIC2_GPIINTFLAG; 717 if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq); 718 for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++) 719 if (irq & gpio_irq_mask[j]) 720 do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j , regs); 721 } 722 723 if (i >= MAX_ASIC_ISR_LOOPS) 724 printk("%s: interrupt processing overrun\n", __FUNCTION__); 725 726 /* For level-based interrupts */ 727 desc->chip->unmask(irq); 728 729 } 730 731 static struct irqaction h3800_irq = { 732 .name = "h3800_asic", 733 .handler = h3800_IRQ_demux, 734 .flags = SA_INTERRUPT | SA_TIMER, 735 }; 736 737 u32 kpio_int_shadow = 0; 738 739 740 /* mask_ack <- IRQ is first serviced. 741 mask <- IRQ is disabled. 742 unmask <- IRQ is enabled 743 744 The INTCLR registers are poorly documented. I believe that writing 745 a "1" to the register clears the specific interrupt, but the documentation 746 indicates writing a "0" clears the interrupt. In any case, they shouldn't 747 be read (that's the INTFLAG register) 748 */ 749 750 static void h3800_mask_ack_kpio_irq(unsigned int irq) 751 { 752 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; 753 kpio_int_shadow &= ~mask; 754 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; 755 H3800_ASIC2_KPIINTCLR = mask; 756 } 757 758 static void h3800_mask_kpio_irq(unsigned int irq) 759 { 760 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; 761 kpio_int_shadow &= ~mask; 762 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; 763 } 764 765 static void h3800_unmask_kpio_irq(unsigned int irq) 766 { 767 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; 768 kpio_int_shadow |= mask; 769 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; 770 } 771 772 static void h3800_mask_ack_gpio_irq(unsigned int irq) 773 { 774 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; 775 H3800_ASIC2_GPIINTSTAT &= ~mask; 776 H3800_ASIC2_GPIINTCLR = mask; 777 } 778 779 static void h3800_mask_gpio_irq(unsigned int irq) 780 { 781 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; 782 H3800_ASIC2_GPIINTSTAT &= ~mask; 783 } 784 785 static void h3800_unmask_gpio_irq(unsigned int irq) 786 { 787 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; 788 H3800_ASIC2_GPIINTSTAT |= mask; 789 } 790 791 static void __init h3800_init_irq(void) 792 { 793 int i; 794 795 /* Initialize standard IRQs */ 796 sa1100_init_irq(); 797 798 /* Disable all IRQs and set up clock */ 799 H3800_ASIC2_KPIINTSTAT = 0; /* Disable all interrupts */ 800 H3800_ASIC2_GPIINTSTAT = 0; 801 802 H3800_ASIC2_KPIINTCLR = 0; /* Clear all KPIO interrupts */ 803 H3800_ASIC2_GPIINTCLR = 0; /* Clear all GPIO interrupts */ 804 805 // H3800_ASIC2_KPIINTCLR = 0xffff; /* Clear all KPIO interrupts */ 806 // H3800_ASIC2_GPIINTCLR = 0xffff; /* Clear all GPIO interrupts */ 807 808 H3800_ASIC2_CLOCK_Enable |= ASIC2_CLOCK_EX0; /* 32 kHZ crystal on */ 809 H3800_ASIC2_INTR_ClockPrescale |= ASIC2_INTCPS_SET; 810 H3800_ASIC2_INTR_ClockPrescale = ASIC2_INTCPS_CPS(0x0e) | ASIC2_INTCPS_SET; 811 H3800_ASIC2_INTR_TimerSet = 1; 812 813 #if 0 814 for (i = 0; i < H3800_KPIO_IRQ_COUNT; i++) { 815 int irq = i + H3800_KPIO_IRQ_START; 816 irq_desc[irq].valid = 1; 817 irq_desc[irq].probe_ok = 1; 818 set_irq_chip(irq, &h3800_kpio_irqchip); 819 } 820 821 for (i = 0; i < H3800_GPIO_IRQ_COUNT; i++) { 822 int irq = i + H3800_GPIO_IRQ_START; 823 irq_desc[irq].valid = 1; 824 irq_desc[irq].probe_ok = 1; 825 set_irq_chip(irq, &h3800_gpio_irqchip); 826 } 827 #endif 828 set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING); 829 set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, &h3800_IRQ_demux); 830 } 831 832 833 #define ASIC1_OUTPUTS 0x7fff /* First 15 bits are used */ 834 835 static void __init h3800_map_io(void) 836 { 837 h3xxx_map_io(); 838 839 /* Add wakeup on AC plug/unplug */ 840 PWER |= PWER_GPIO12; 841 842 /* Initialize h3800-specific values here */ 843 GPCR = 0x0fffffff; /* All outputs are set low by default */ 844 GAFR = GPIO_H3800_CLK_OUT | 845 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | 846 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; 847 GPDR = GPIO_H3800_CLK_OUT | 848 GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | 849 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | 850 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | 851 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; 852 TUCR = TUCR_3_6864MHz; /* Seems to be used only for the Bluetooth UART */ 853 854 /* Fix the memory bus */ 855 MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; 856 857 /* Set up ASIC #1 */ 858 H3800_ASIC1_GPIO_DIR = ASIC1_OUTPUTS; /* All outputs */ 859 H3800_ASIC1_GPIO_MASK = ASIC1_OUTPUTS; /* No interrupts */ 860 H3800_ASIC1_GPIO_SLEEP_MASK = ASIC1_OUTPUTS; 861 H3800_ASIC1_GPIO_SLEEP_DIR = ASIC1_OUTPUTS; 862 H3800_ASIC1_GPIO_SLEEP_OUT = GPIO1_EAR_ON_N; 863 H3800_ASIC1_GPIO_BATT_FAULT_DIR = ASIC1_OUTPUTS; 864 H3800_ASIC1_GPIO_BATT_FAULT_OUT = GPIO1_EAR_ON_N; 865 866 H3800_ASIC1_GPIO_OUT = GPIO1_IR_ON_N 867 | GPIO1_RS232_ON 868 | GPIO1_EAR_ON_N; 869 870 /* Set up ASIC #2 */ 871 H3800_ASIC2_GPIOPIOD = GPIO2_IN_Y1_N | GPIO2_IN_X1_N; 872 H3800_ASIC2_GPOBFSTAT = GPIO2_IN_Y1_N | GPIO2_IN_X1_N; 873 874 H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ 875 | GPIO2_SD_DETECT 876 | GPIO2_EAR_IN_N 877 | GPIO2_USB_DETECT_N 878 | GPIO2_SD_CON_SLT; 879 880 /* TODO : Set sleep states & battery fault states */ 881 882 /* Clear VPP Enable */ 883 H3800_ASIC2_FlashWP_VPP_ON = 0; 884 ipaq_model_ops = h3800_model_ops; 885 } 886 887 MACHINE_START(H3800, "Compaq iPAQ H3800") 888 .phys_ram = 0xc0000000, 889 .phys_io = 0x80000000, 890 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, 891 .boot_params = 0xc0000100, 892 .map_io = h3800_map_io, 893 .init_irq = h3800_init_irq, 894 .timer = &sa1100_timer, 895 .init_machine = h3xxx_mach_init, 896 MACHINE_END 897 898 #endif /* CONFIG_SA1100_H3800 */ 899