xref: /linux/arch/arm/mach-sa1100/assabet.c (revision f3d9478b2ce468c3115b02ecae7e975990697f15)
1 /*
2  * linux/arch/arm/mach-sa1100/assabet.c
3  *
4  * Author: Nicolas Pitre
5  *
6  * This file contains all Assabet-specific tweaks.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 #include <linux/config.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/errno.h>
17 #include <linux/ioport.h>
18 #include <linux/serial_core.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/delay.h>
22 #include <linux/mm.h>
23 
24 #include <asm/hardware.h>
25 #include <asm/mach-types.h>
26 #include <asm/irq.h>
27 #include <asm/setup.h>
28 #include <asm/page.h>
29 #include <asm/pgtable-hwdef.h>
30 #include <asm/pgtable.h>
31 #include <asm/tlbflush.h>
32 
33 #include <asm/mach/arch.h>
34 #include <asm/mach/flash.h>
35 #include <asm/mach/irda.h>
36 #include <asm/mach/map.h>
37 #include <asm/mach/serial_sa1100.h>
38 #include <asm/arch/assabet.h>
39 #include <asm/arch/mcp.h>
40 
41 #include "generic.h"
42 
43 #define ASSABET_BCR_DB1110 \
44 	(ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
45 	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
46 	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
47 	 ASSABET_BCR_IRDA_MD0)
48 
49 #define ASSABET_BCR_DB1111 \
50 	(ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
51 	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
52 	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
53 	 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
54 	 ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
55 
56 unsigned long SCR_value = ASSABET_SCR_INIT;
57 EXPORT_SYMBOL(SCR_value);
58 
59 static unsigned long BCR_value = ASSABET_BCR_DB1110;
60 
61 void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
62 {
63 	unsigned long flags;
64 
65 	local_irq_save(flags);
66 	BCR_value = (BCR_value & ~mask) | val;
67 	ASSABET_BCR = BCR_value;
68 	local_irq_restore(flags);
69 }
70 
71 EXPORT_SYMBOL(ASSABET_BCR_frob);
72 
73 static void assabet_backlight_power(int on)
74 {
75 #ifndef ASSABET_PAL_VIDEO
76 	if (on)
77 		ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
78 	else
79 #endif
80 		ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
81 }
82 
83 /*
84  * Turn on/off the backlight.  When turning the backlight on,
85  * we wait 500us after turning it on so we don't cause the
86  * supplies to droop when we enable the LCD controller (and
87  * cause a hard reset.)
88  */
89 static void assabet_lcd_power(int on)
90 {
91 #ifndef ASSABET_PAL_VIDEO
92 	if (on) {
93 		ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
94 		udelay(500);
95 	} else
96 #endif
97 		ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
98 }
99 
100 
101 /*
102  * Assabet flash support code.
103  */
104 
105 #ifdef ASSABET_REV_4
106 /*
107  * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
108  */
109 static struct mtd_partition assabet_partitions[] = {
110 	{
111 		.name		= "bootloader",
112 		.size		= 0x00020000,
113 		.offset		= 0,
114 		.mask_flags	= MTD_WRITEABLE,
115 	}, {
116 		.name		= "bootloader params",
117 		.size		= 0x00020000,
118 		.offset		= MTDPART_OFS_APPEND,
119 		.mask_flags	= MTD_WRITEABLE,
120 	}, {
121 		.name		= "jffs",
122 		.size		= MTDPART_SIZ_FULL,
123 		.offset		= MTDPART_OFS_APPEND,
124 	}
125 };
126 #else
127 /*
128  * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
129  */
130 static struct mtd_partition assabet_partitions[] = {
131 	{
132 		.name		= "bootloader",
133 		.size		= 0x00040000,
134 		.offset		= 0,
135 		.mask_flags	= MTD_WRITEABLE,
136 	}, {
137 		.name		= "bootloader params",
138 		.size		= 0x00040000,
139 		.offset		= MTDPART_OFS_APPEND,
140 		.mask_flags	= MTD_WRITEABLE,
141 	}, {
142 		.name		= "jffs",
143 		.size		= MTDPART_SIZ_FULL,
144 		.offset		= MTDPART_OFS_APPEND,
145 	}
146 };
147 #endif
148 
149 static struct flash_platform_data assabet_flash_data = {
150 	.map_name	= "cfi_probe",
151 	.parts		= assabet_partitions,
152 	.nr_parts	= ARRAY_SIZE(assabet_partitions),
153 };
154 
155 static struct resource assabet_flash_resources[] = {
156 	{
157 		.start	= SA1100_CS0_PHYS,
158 		.end	= SA1100_CS0_PHYS + SZ_32M - 1,
159 		.flags	= IORESOURCE_MEM,
160 	}, {
161 		.start	= SA1100_CS1_PHYS,
162 		.end	= SA1100_CS1_PHYS + SZ_32M - 1,
163 		.flags	= IORESOURCE_MEM,
164 	}
165 };
166 
167 
168 /*
169  * Assabet IrDA support code.
170  */
171 
172 static int assabet_irda_set_power(struct device *dev, unsigned int state)
173 {
174 	static unsigned int bcr_state[4] = {
175 		ASSABET_BCR_IRDA_MD0,
176 		ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
177 		ASSABET_BCR_IRDA_MD1,
178 		0
179 	};
180 
181 	if (state < 4) {
182 		state = bcr_state[state];
183 		ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
184 					   ASSABET_BCR_IRDA_MD0));
185 		ASSABET_BCR_set(state);
186 	}
187 	return 0;
188 }
189 
190 static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
191 {
192 	if (speed < 4000000)
193 		ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
194 	else
195 		ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
196 }
197 
198 static struct irda_platform_data assabet_irda_data = {
199 	.set_power	= assabet_irda_set_power,
200 	.set_speed	= assabet_irda_set_speed,
201 };
202 
203 static struct mcp_plat_data assabet_mcp_data = {
204 	.mccr0		= MCCR0_ADM,
205 	.sclk_rate	= 11981000,
206 };
207 
208 static void __init assabet_init(void)
209 {
210 	/*
211 	 * Ensure that the power supply is in "high power" mode.
212 	 */
213 	GPDR |= GPIO_GPIO16;
214 	GPSR = GPIO_GPIO16;
215 
216 	/*
217 	 * Ensure that these pins are set as outputs and are driving
218 	 * logic 0.  This ensures that we won't inadvertently toggle
219 	 * the WS latch in the CPLD, and we don't float causing
220 	 * excessive power drain.  --rmk
221 	 */
222 	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
223 	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
224 
225 	/*
226 	 * Set up registers for sleep mode.
227 	 */
228 	PWER = PWER_GPIO0;
229 	PGSR = 0;
230 	PCFR = 0;
231 	PSDR = 0;
232 	PPDR |= PPC_TXD3 | PPC_TXD1;
233 	PPSR |= PPC_TXD3 | PPC_TXD1;
234 
235 	sa1100fb_lcd_power = assabet_lcd_power;
236 	sa1100fb_backlight_power = assabet_backlight_power;
237 
238 	if (machine_has_neponset()) {
239 		/*
240 		 * Angel sets this, but other bootloaders may not.
241 		 *
242 		 * This must precede any driver calls to BCR_set()
243 		 * or BCR_clear().
244 		 */
245 		ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
246 
247 #ifndef CONFIG_ASSABET_NEPONSET
248 		printk( "Warning: Neponset detected but full support "
249 			"hasn't been configured in the kernel\n" );
250 #endif
251 	}
252 
253 	sa11x0_set_flash_data(&assabet_flash_data, assabet_flash_resources,
254 			      ARRAY_SIZE(assabet_flash_resources));
255 	sa11x0_set_irda_data(&assabet_irda_data);
256 	sa11x0_set_mcp_data(&assabet_mcp_data);
257 }
258 
259 /*
260  * On Assabet, we must probe for the Neponset board _before_
261  * paging_init() has occurred to actually determine the amount
262  * of RAM available.  To do so, we map the appropriate IO section
263  * in the page table here in order to access GPIO registers.
264  */
265 static void __init map_sa1100_gpio_regs( void )
266 {
267 	unsigned long phys = __PREG(GPLR) & PMD_MASK;
268 	unsigned long virt = io_p2v(phys);
269 	int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
270 	pmd_t *pmd;
271 
272 	pmd = pmd_offset(pgd_offset_k(virt), virt);
273 	*pmd = __pmd(phys | prot);
274 	flush_pmd_entry(pmd);
275 }
276 
277 /*
278  * Read System Configuration "Register"
279  * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
280  * User's Guide", section 4.4.1)
281  *
282  * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
283  * to set up the serial port for decompression status messages. We
284  * repeat it here because the kernel may not be loaded as a zImage, and
285  * also because it's a hassle to communicate the SCR value to the kernel
286  * from the decompressor.
287  *
288  * Note that IRQs are guaranteed to be disabled.
289  */
290 static void __init get_assabet_scr(void)
291 {
292 	unsigned long scr, i;
293 
294 	GPDR |= 0x3fc;			/* Configure GPIO 9:2 as outputs */
295 	GPSR = 0x3fc;			/* Write 0xFF to GPIO 9:2 */
296 	GPDR &= ~(0x3fc);		/* Configure GPIO 9:2 as inputs */
297 	for(i = 100; i--; )		/* Read GPIO 9:2 */
298 		scr = GPLR;
299 	GPDR |= 0x3fc;			/*  restore correct pin direction */
300 	scr &= 0x3fc;			/* save as system configuration byte. */
301 	SCR_value = scr;
302 }
303 
304 static void __init
305 fixup_assabet(struct machine_desc *desc, struct tag *tags,
306 	      char **cmdline, struct meminfo *mi)
307 {
308 	/* This must be done before any call to machine_has_neponset() */
309 	map_sa1100_gpio_regs();
310 	get_assabet_scr();
311 
312 	if (machine_has_neponset())
313 		printk("Neponset expansion board detected\n");
314 }
315 
316 
317 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
318 {
319 	if (port->mapbase == _Ser1UTCR0) {
320 		if (state)
321 			ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
322 					  ASSABET_BCR_COM_RTS |
323 					  ASSABET_BCR_COM_DTR);
324 		else
325 			ASSABET_BCR_set(ASSABET_BCR_RS232EN |
326 					ASSABET_BCR_COM_RTS |
327 					ASSABET_BCR_COM_DTR);
328 	}
329 }
330 
331 /*
332  * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
333  * and UART3 (radio module).  We only handle them for UART1 here.
334  */
335 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
336 {
337 	if (port->mapbase == _Ser1UTCR0) {
338 		u_int set = 0, clear = 0;
339 
340 		if (mctrl & TIOCM_RTS)
341 			clear |= ASSABET_BCR_COM_RTS;
342 		else
343 			set |= ASSABET_BCR_COM_RTS;
344 
345 		if (mctrl & TIOCM_DTR)
346 			clear |= ASSABET_BCR_COM_DTR;
347 		else
348 			set |= ASSABET_BCR_COM_DTR;
349 
350 		ASSABET_BCR_clear(clear);
351 		ASSABET_BCR_set(set);
352 	}
353 }
354 
355 static u_int assabet_get_mctrl(struct uart_port *port)
356 {
357 	u_int ret = 0;
358 	u_int bsr = ASSABET_BSR;
359 
360 	/* need 2 reads to read current value */
361 	bsr = ASSABET_BSR;
362 
363 	if (port->mapbase == _Ser1UTCR0) {
364 		if (bsr & ASSABET_BSR_COM_DCD)
365 			ret |= TIOCM_CD;
366 		if (bsr & ASSABET_BSR_COM_CTS)
367 			ret |= TIOCM_CTS;
368 		if (bsr & ASSABET_BSR_COM_DSR)
369 			ret |= TIOCM_DSR;
370 	} else if (port->mapbase == _Ser3UTCR0) {
371 		if (bsr & ASSABET_BSR_RAD_DCD)
372 			ret |= TIOCM_CD;
373 		if (bsr & ASSABET_BSR_RAD_CTS)
374 			ret |= TIOCM_CTS;
375 		if (bsr & ASSABET_BSR_RAD_DSR)
376 			ret |= TIOCM_DSR;
377 		if (bsr & ASSABET_BSR_RAD_RI)
378 			ret |= TIOCM_RI;
379 	} else {
380 		ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
381 	}
382 
383 	return ret;
384 }
385 
386 static struct sa1100_port_fns assabet_port_fns __initdata = {
387 	.set_mctrl	= assabet_set_mctrl,
388 	.get_mctrl	= assabet_get_mctrl,
389 	.pm		= assabet_uart_pm,
390 };
391 
392 static struct map_desc assabet_io_desc[] __initdata = {
393   	{	/* Board Control Register */
394 		.virtual	=  0xf1000000,
395 		.pfn		= __phys_to_pfn(0x12000000),
396 		.length		= 0x00100000,
397 		.type		= MT_DEVICE
398 	}, {	/* MQ200 */
399 		.virtual	=  0xf2800000,
400 		.pfn		= __phys_to_pfn(0x4b800000),
401 		.length		= 0x00800000,
402 		.type		= MT_DEVICE
403 	}
404 };
405 
406 static void __init assabet_map_io(void)
407 {
408 	sa1100_map_io();
409 	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
410 
411 	/*
412 	 * Set SUS bit in SDCR0 so serial port 1 functions.
413 	 * Its called GPCLKR0 in my SA1110 manual.
414 	 */
415 	Ser1SDCR0 |= SDCR0_SUS;
416 
417 	if (machine_has_neponset()) {
418 #ifdef CONFIG_ASSABET_NEPONSET
419 		extern void neponset_map_io(void);
420 
421 		/*
422 		 * We map Neponset registers even if it isn't present since
423 		 * many drivers will try to probe their stuff (and fail).
424 		 * This is still more friendly than a kernel paging request
425 		 * crash.
426 		 */
427 		neponset_map_io();
428 #endif
429 	} else {
430 		sa1100_register_uart_fns(&assabet_port_fns);
431 	}
432 
433 	/*
434 	 * When Neponset is attached, the first UART should be
435 	 * UART3.  That's what Angel is doing and many documents
436 	 * are stating this.
437 	 *
438 	 * We do the Neponset mapping even if Neponset support
439 	 * isn't compiled in so the user will still get something on
440 	 * the expected physical serial port.
441 	 *
442 	 * We no longer do this; not all boot loaders support it,
443 	 * and UART3 appears to be somewhat unreliable with blob.
444 	 */
445 	sa1100_register_uart(0, 1);
446 	sa1100_register_uart(2, 3);
447 }
448 
449 
450 MACHINE_START(ASSABET, "Intel-Assabet")
451 	.phys_io	= 0x80000000,
452 	.io_pg_offst	= ((0xf8000000) >> 18) & 0xfffc,
453 	.boot_params	= 0xc0000100,
454 	.fixup		= fixup_assabet,
455 	.map_io		= assabet_map_io,
456 	.init_irq	= sa1100_init_irq,
457 	.timer		= &sa1100_timer,
458 	.init_machine	= assabet_init,
459 MACHINE_END
460