1/* SPDX-License-Identifier: GPL-2.0 */ 2/* linux/arch/arm/plat-s3c64xx/sleep.S 3 * 4 * Copyright 2008 Openmoko, Inc. 5 * Copyright 2008 Simtec Electronics 6 * Ben Dooks <ben@simtec.co.uk> 7 * http://armlinux.simtec.co.uk/ 8 * 9 * S3C64XX CPU sleep code 10 */ 11 12#include <linux/linkage.h> 13#include <asm/assembler.h> 14#include "map.h" 15 16#undef S3C64XX_VA_GPIO 17#define S3C64XX_VA_GPIO (0x0) 18 19#include "regs-gpio.h" 20 21#define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) 22 23 .text 24 25 /* Sleep magic, the word before the resume entry point so that the 26 * bootloader can check for a resumeable image. */ 27 28 .word 0x2bedf00d 29 30 /* s3c_cpu_reusme 31 * 32 * This is the entry point, stored by whatever method the bootloader 33 * requires to get the kernel runnign again. This code expects to be 34 * entered with no caches live and the MMU disabled. It will then 35 * restore the MMU and other basic CP registers saved and restart 36 * the kernel C code to finish the resume code. 37 */ 38 39ENTRY(s3c_cpu_resume) 40 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE 41 ldr r2, =LL_UART /* for debug */ 42 43#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 44 45#define S3C64XX_GPNCON (S3C64XX_GPN_BASE + 0x00) 46#define S3C64XX_GPNDAT (S3C64XX_GPN_BASE + 0x04) 47 48#define S3C64XX_GPN_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) 49#define S3C64XX_GPN_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) 50 51 /* Initialise the GPIO state if we are debugging via the SMDK LEDs, 52 * as the uboot version supplied resets these to inputs during the 53 * resume checks. 54 */ 55 56 ldr r3, =S3C64XX_PA_GPIO 57 ldr r0, [ r3, #S3C64XX_GPNCON ] 58 bic r0, r0, #(S3C64XX_GPN_CONMASK(12) | S3C64XX_GPN_CONMASK(13) | \ 59 S3C64XX_GPN_CONMASK(14) | S3C64XX_GPN_CONMASK(15)) 60 orr r0, r0, #(S3C64XX_GPN_OUTPUT(12) | S3C64XX_GPN_OUTPUT(13) | \ 61 S3C64XX_GPN_OUTPUT(14) | S3C64XX_GPN_OUTPUT(15)) 62 str r0, [ r3, #S3C64XX_GPNCON ] 63 64 ldr r0, [ r3, #S3C64XX_GPNDAT ] 65 bic r0, r0, #0xf << 12 @ GPN12..15 66 orr r0, r0, #1 << 15 @ GPN15 67 str r0, [ r3, #S3C64XX_GPNDAT ] 68#endif 69 b cpu_resume 70