171b9114dSArnd Bergmann // SPDX-License-Identifier: GPL-2.0 271b9114dSArnd Bergmann // 371b9114dSArnd Bergmann // Copyright (c) 2011 Samsung Electronics Co., Ltd. 471b9114dSArnd Bergmann // http://www.samsung.com 571b9114dSArnd Bergmann // 671b9114dSArnd Bergmann // Copyright 2008 Openmoko, Inc. 771b9114dSArnd Bergmann // Copyright 2008 Simtec Electronics 871b9114dSArnd Bergmann // Ben Dooks <ben@simtec.co.uk> 971b9114dSArnd Bergmann // http://armlinux.simtec.co.uk/ 1071b9114dSArnd Bergmann // 1171b9114dSArnd Bergmann // Common Codes for S3C64XX machines 1271b9114dSArnd Bergmann 1371b9114dSArnd Bergmann /* 1471b9114dSArnd Bergmann * NOTE: Code in this file is not used when booting with Device Tree support. 1571b9114dSArnd Bergmann */ 1671b9114dSArnd Bergmann 1771b9114dSArnd Bergmann #include <linux/kernel.h> 1871b9114dSArnd Bergmann #include <linux/init.h> 1971b9114dSArnd Bergmann #include <linux/module.h> 2071b9114dSArnd Bergmann #include <linux/interrupt.h> 2171b9114dSArnd Bergmann #include <linux/ioport.h> 2271b9114dSArnd Bergmann #include <linux/serial_core.h> 2371b9114dSArnd Bergmann #include <linux/serial_s3c.h> 2471b9114dSArnd Bergmann #include <linux/platform_device.h> 2571b9114dSArnd Bergmann #include <linux/reboot.h> 2671b9114dSArnd Bergmann #include <linux/io.h> 2771b9114dSArnd Bergmann #include <linux/clk/samsung.h> 2871b9114dSArnd Bergmann #include <linux/dma-mapping.h> 2971b9114dSArnd Bergmann #include <linux/irq.h> 3071b9114dSArnd Bergmann #include <linux/gpio.h> 3171b9114dSArnd Bergmann #include <linux/irqchip/arm-vic.h> 3271b9114dSArnd Bergmann #include <clocksource/samsung_pwm.h> 3371b9114dSArnd Bergmann 3471b9114dSArnd Bergmann #include <asm/mach/arch.h> 3571b9114dSArnd Bergmann #include <asm/mach/map.h> 3671b9114dSArnd Bergmann #include <asm/system_misc.h> 3771b9114dSArnd Bergmann 38*c6ff132dSArnd Bergmann #include "map.h" 3971b9114dSArnd Bergmann #include <mach/irqs.h> 40*c6ff132dSArnd Bergmann #include "regs-gpio.h" 41*c6ff132dSArnd Bergmann #include "gpio-samsung.h" 4271b9114dSArnd Bergmann 43*c6ff132dSArnd Bergmann #include "cpu.h" 44*c6ff132dSArnd Bergmann #include "devs.h" 45*c6ff132dSArnd Bergmann #include "pm.h" 46*c6ff132dSArnd Bergmann #include "gpio-cfg.h" 47*c6ff132dSArnd Bergmann #include "pwm-core.h" 48*c6ff132dSArnd Bergmann #include "regs-irqtype.h" 4971b9114dSArnd Bergmann #include "s3c64xx.h" 5071b9114dSArnd Bergmann #include "irq-uart-s3c64xx.h" 5171b9114dSArnd Bergmann 5271b9114dSArnd Bergmann /* External clock frequency */ 5371b9114dSArnd Bergmann static unsigned long xtal_f __ro_after_init = 12000000; 5471b9114dSArnd Bergmann static unsigned long xusbxti_f __ro_after_init = 48000000; 5571b9114dSArnd Bergmann 5671b9114dSArnd Bergmann void __init s3c64xx_set_xtal_freq(unsigned long freq) 5771b9114dSArnd Bergmann { 5871b9114dSArnd Bergmann xtal_f = freq; 5971b9114dSArnd Bergmann } 6071b9114dSArnd Bergmann 6171b9114dSArnd Bergmann void __init s3c64xx_set_xusbxti_freq(unsigned long freq) 6271b9114dSArnd Bergmann { 6371b9114dSArnd Bergmann xusbxti_f = freq; 6471b9114dSArnd Bergmann } 6571b9114dSArnd Bergmann 6671b9114dSArnd Bergmann /* uart registration process */ 6771b9114dSArnd Bergmann 6871b9114dSArnd Bergmann static void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) 6971b9114dSArnd Bergmann { 7071b9114dSArnd Bergmann s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); 7171b9114dSArnd Bergmann } 7271b9114dSArnd Bergmann 7371b9114dSArnd Bergmann /* table of supported CPUs */ 7471b9114dSArnd Bergmann 7571b9114dSArnd Bergmann static const char name_s3c6400[] = "S3C6400"; 7671b9114dSArnd Bergmann static const char name_s3c6410[] = "S3C6410"; 7771b9114dSArnd Bergmann 7871b9114dSArnd Bergmann static struct cpu_table cpu_ids[] __initdata = { 7971b9114dSArnd Bergmann { 8071b9114dSArnd Bergmann .idcode = S3C6400_CPU_ID, 8171b9114dSArnd Bergmann .idmask = S3C64XX_CPU_MASK, 8271b9114dSArnd Bergmann .map_io = s3c6400_map_io, 8371b9114dSArnd Bergmann .init_uarts = s3c64xx_init_uarts, 8471b9114dSArnd Bergmann .init = s3c6400_init, 8571b9114dSArnd Bergmann .name = name_s3c6400, 8671b9114dSArnd Bergmann }, { 8771b9114dSArnd Bergmann .idcode = S3C6410_CPU_ID, 8871b9114dSArnd Bergmann .idmask = S3C64XX_CPU_MASK, 8971b9114dSArnd Bergmann .map_io = s3c6410_map_io, 9071b9114dSArnd Bergmann .init_uarts = s3c64xx_init_uarts, 9171b9114dSArnd Bergmann .init = s3c6410_init, 9271b9114dSArnd Bergmann .name = name_s3c6410, 9371b9114dSArnd Bergmann }, 9471b9114dSArnd Bergmann }; 9571b9114dSArnd Bergmann 9671b9114dSArnd Bergmann /* minimal IO mapping */ 9771b9114dSArnd Bergmann 9871b9114dSArnd Bergmann /* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */ 9971b9114dSArnd Bergmann #define UART_OFFS (S3C_PA_UART & 0xfffff) 10071b9114dSArnd Bergmann 10171b9114dSArnd Bergmann static struct map_desc s3c_iodesc[] __initdata = { 10271b9114dSArnd Bergmann { 10371b9114dSArnd Bergmann .virtual = (unsigned long)S3C_VA_SYS, 10471b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON), 10571b9114dSArnd Bergmann .length = SZ_4K, 10671b9114dSArnd Bergmann .type = MT_DEVICE, 10771b9114dSArnd Bergmann }, { 10871b9114dSArnd Bergmann .virtual = (unsigned long)S3C_VA_MEM, 10971b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C64XX_PA_SROM), 11071b9114dSArnd Bergmann .length = SZ_4K, 11171b9114dSArnd Bergmann .type = MT_DEVICE, 11271b9114dSArnd Bergmann }, { 11371b9114dSArnd Bergmann .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS), 11471b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C_PA_UART), 11571b9114dSArnd Bergmann .length = SZ_4K, 11671b9114dSArnd Bergmann .type = MT_DEVICE, 11771b9114dSArnd Bergmann }, { 11871b9114dSArnd Bergmann .virtual = (unsigned long)VA_VIC0, 11971b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C64XX_PA_VIC0), 12071b9114dSArnd Bergmann .length = SZ_16K, 12171b9114dSArnd Bergmann .type = MT_DEVICE, 12271b9114dSArnd Bergmann }, { 12371b9114dSArnd Bergmann .virtual = (unsigned long)VA_VIC1, 12471b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C64XX_PA_VIC1), 12571b9114dSArnd Bergmann .length = SZ_16K, 12671b9114dSArnd Bergmann .type = MT_DEVICE, 12771b9114dSArnd Bergmann }, { 12871b9114dSArnd Bergmann .virtual = (unsigned long)S3C_VA_TIMER, 12971b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C_PA_TIMER), 13071b9114dSArnd Bergmann .length = SZ_16K, 13171b9114dSArnd Bergmann .type = MT_DEVICE, 13271b9114dSArnd Bergmann }, { 13371b9114dSArnd Bergmann .virtual = (unsigned long)S3C64XX_VA_GPIO, 13471b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C64XX_PA_GPIO), 13571b9114dSArnd Bergmann .length = SZ_4K, 13671b9114dSArnd Bergmann .type = MT_DEVICE, 13771b9114dSArnd Bergmann }, { 13871b9114dSArnd Bergmann .virtual = (unsigned long)S3C64XX_VA_MODEM, 13971b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C64XX_PA_MODEM), 14071b9114dSArnd Bergmann .length = SZ_4K, 14171b9114dSArnd Bergmann .type = MT_DEVICE, 14271b9114dSArnd Bergmann }, { 14371b9114dSArnd Bergmann .virtual = (unsigned long)S3C_VA_WATCHDOG, 14471b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG), 14571b9114dSArnd Bergmann .length = SZ_4K, 14671b9114dSArnd Bergmann .type = MT_DEVICE, 14771b9114dSArnd Bergmann }, { 14871b9114dSArnd Bergmann .virtual = (unsigned long)S3C_VA_USB_HSPHY, 14971b9114dSArnd Bergmann .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY), 15071b9114dSArnd Bergmann .length = SZ_1K, 15171b9114dSArnd Bergmann .type = MT_DEVICE, 15271b9114dSArnd Bergmann }, 15371b9114dSArnd Bergmann }; 15471b9114dSArnd Bergmann 15571b9114dSArnd Bergmann static struct bus_type s3c64xx_subsys = { 15671b9114dSArnd Bergmann .name = "s3c64xx-core", 15771b9114dSArnd Bergmann .dev_name = "s3c64xx-core", 15871b9114dSArnd Bergmann }; 15971b9114dSArnd Bergmann 16071b9114dSArnd Bergmann static struct device s3c64xx_dev = { 16171b9114dSArnd Bergmann .bus = &s3c64xx_subsys, 16271b9114dSArnd Bergmann }; 16371b9114dSArnd Bergmann 16471b9114dSArnd Bergmann static struct samsung_pwm_variant s3c64xx_pwm_variant = { 16571b9114dSArnd Bergmann .bits = 32, 16671b9114dSArnd Bergmann .div_base = 0, 16771b9114dSArnd Bergmann .has_tint_cstat = true, 16871b9114dSArnd Bergmann .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5), 16971b9114dSArnd Bergmann }; 17071b9114dSArnd Bergmann 17171b9114dSArnd Bergmann void __init samsung_set_timer_source(unsigned int event, unsigned int source) 17271b9114dSArnd Bergmann { 17371b9114dSArnd Bergmann s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; 17471b9114dSArnd Bergmann s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source)); 17571b9114dSArnd Bergmann } 17671b9114dSArnd Bergmann 17771b9114dSArnd Bergmann void __init samsung_timer_init(void) 17871b9114dSArnd Bergmann { 17971b9114dSArnd Bergmann unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { 18071b9114dSArnd Bergmann IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC, 18171b9114dSArnd Bergmann IRQ_TIMER3_VIC, IRQ_TIMER4_VIC, 18271b9114dSArnd Bergmann }; 18371b9114dSArnd Bergmann 18471b9114dSArnd Bergmann samsung_pwm_clocksource_init(S3C_VA_TIMER, 18571b9114dSArnd Bergmann timer_irqs, &s3c64xx_pwm_variant); 18671b9114dSArnd Bergmann } 18771b9114dSArnd Bergmann 18871b9114dSArnd Bergmann /* read cpu identification code */ 18971b9114dSArnd Bergmann 19071b9114dSArnd Bergmann void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) 19171b9114dSArnd Bergmann { 19271b9114dSArnd Bergmann /* initialise the io descriptors we need for initialisation */ 19371b9114dSArnd Bergmann iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); 19471b9114dSArnd Bergmann iotable_init(mach_desc, size); 19571b9114dSArnd Bergmann 19671b9114dSArnd Bergmann /* detect cpu id */ 19771b9114dSArnd Bergmann s3c64xx_init_cpu(); 19871b9114dSArnd Bergmann 19971b9114dSArnd Bergmann s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 20071b9114dSArnd Bergmann 20171b9114dSArnd Bergmann samsung_pwm_set_platdata(&s3c64xx_pwm_variant); 20271b9114dSArnd Bergmann } 20371b9114dSArnd Bergmann 20471b9114dSArnd Bergmann static __init int s3c64xx_dev_init(void) 20571b9114dSArnd Bergmann { 20671b9114dSArnd Bergmann /* Not applicable when using DT. */ 20771b9114dSArnd Bergmann if (of_have_populated_dt() || !soc_is_s3c64xx()) 20871b9114dSArnd Bergmann return 0; 20971b9114dSArnd Bergmann 21071b9114dSArnd Bergmann subsys_system_register(&s3c64xx_subsys, NULL); 21171b9114dSArnd Bergmann return device_register(&s3c64xx_dev); 21271b9114dSArnd Bergmann } 21371b9114dSArnd Bergmann core_initcall(s3c64xx_dev_init); 21471b9114dSArnd Bergmann 21571b9114dSArnd Bergmann /* 21671b9114dSArnd Bergmann * setup the sources the vic should advertise resume 21771b9114dSArnd Bergmann * for, even though it is not doing the wake 21871b9114dSArnd Bergmann * (set_irq_wake needs to be valid) 21971b9114dSArnd Bergmann */ 22071b9114dSArnd Bergmann #define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE)) 22171b9114dSArnd Bergmann #define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \ 22271b9114dSArnd Bergmann 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \ 22371b9114dSArnd Bergmann 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \ 22471b9114dSArnd Bergmann 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \ 22571b9114dSArnd Bergmann 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE)) 22671b9114dSArnd Bergmann 22771b9114dSArnd Bergmann void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) 22871b9114dSArnd Bergmann { 22971b9114dSArnd Bergmann s3c64xx_clk_init(NULL, xtal_f, xusbxti_f, soc_is_s3c6400(), S3C_VA_SYS); 23071b9114dSArnd Bergmann 23171b9114dSArnd Bergmann printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); 23271b9114dSArnd Bergmann 23371b9114dSArnd Bergmann /* initialise the pair of VICs */ 23471b9114dSArnd Bergmann vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); 23571b9114dSArnd Bergmann vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); 23671b9114dSArnd Bergmann } 23771b9114dSArnd Bergmann 23871b9114dSArnd Bergmann #define eint_offset(irq) ((irq) - IRQ_EINT(0)) 23971b9114dSArnd Bergmann #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) 24071b9114dSArnd Bergmann 24171b9114dSArnd Bergmann static inline void s3c_irq_eint_mask(struct irq_data *data) 24271b9114dSArnd Bergmann { 24371b9114dSArnd Bergmann u32 mask; 24471b9114dSArnd Bergmann 24571b9114dSArnd Bergmann mask = __raw_readl(S3C64XX_EINT0MASK); 24671b9114dSArnd Bergmann mask |= (u32)data->chip_data; 24771b9114dSArnd Bergmann __raw_writel(mask, S3C64XX_EINT0MASK); 24871b9114dSArnd Bergmann } 24971b9114dSArnd Bergmann 25071b9114dSArnd Bergmann static void s3c_irq_eint_unmask(struct irq_data *data) 25171b9114dSArnd Bergmann { 25271b9114dSArnd Bergmann u32 mask; 25371b9114dSArnd Bergmann 25471b9114dSArnd Bergmann mask = __raw_readl(S3C64XX_EINT0MASK); 25571b9114dSArnd Bergmann mask &= ~((u32)data->chip_data); 25671b9114dSArnd Bergmann __raw_writel(mask, S3C64XX_EINT0MASK); 25771b9114dSArnd Bergmann } 25871b9114dSArnd Bergmann 25971b9114dSArnd Bergmann static inline void s3c_irq_eint_ack(struct irq_data *data) 26071b9114dSArnd Bergmann { 26171b9114dSArnd Bergmann __raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND); 26271b9114dSArnd Bergmann } 26371b9114dSArnd Bergmann 26471b9114dSArnd Bergmann static void s3c_irq_eint_maskack(struct irq_data *data) 26571b9114dSArnd Bergmann { 26671b9114dSArnd Bergmann /* compiler should in-line these */ 26771b9114dSArnd Bergmann s3c_irq_eint_mask(data); 26871b9114dSArnd Bergmann s3c_irq_eint_ack(data); 26971b9114dSArnd Bergmann } 27071b9114dSArnd Bergmann 27171b9114dSArnd Bergmann static int s3c_irq_eint_set_type(struct irq_data *data, unsigned int type) 27271b9114dSArnd Bergmann { 27371b9114dSArnd Bergmann int offs = eint_offset(data->irq); 27471b9114dSArnd Bergmann int pin, pin_val; 27571b9114dSArnd Bergmann int shift; 27671b9114dSArnd Bergmann u32 ctrl, mask; 27771b9114dSArnd Bergmann u32 newvalue = 0; 27871b9114dSArnd Bergmann void __iomem *reg; 27971b9114dSArnd Bergmann 28071b9114dSArnd Bergmann if (offs > 27) 28171b9114dSArnd Bergmann return -EINVAL; 28271b9114dSArnd Bergmann 28371b9114dSArnd Bergmann if (offs <= 15) 28471b9114dSArnd Bergmann reg = S3C64XX_EINT0CON0; 28571b9114dSArnd Bergmann else 28671b9114dSArnd Bergmann reg = S3C64XX_EINT0CON1; 28771b9114dSArnd Bergmann 28871b9114dSArnd Bergmann switch (type) { 28971b9114dSArnd Bergmann case IRQ_TYPE_NONE: 29071b9114dSArnd Bergmann printk(KERN_WARNING "No edge setting!\n"); 29171b9114dSArnd Bergmann break; 29271b9114dSArnd Bergmann 29371b9114dSArnd Bergmann case IRQ_TYPE_EDGE_RISING: 29471b9114dSArnd Bergmann newvalue = S3C2410_EXTINT_RISEEDGE; 29571b9114dSArnd Bergmann break; 29671b9114dSArnd Bergmann 29771b9114dSArnd Bergmann case IRQ_TYPE_EDGE_FALLING: 29871b9114dSArnd Bergmann newvalue = S3C2410_EXTINT_FALLEDGE; 29971b9114dSArnd Bergmann break; 30071b9114dSArnd Bergmann 30171b9114dSArnd Bergmann case IRQ_TYPE_EDGE_BOTH: 30271b9114dSArnd Bergmann newvalue = S3C2410_EXTINT_BOTHEDGE; 30371b9114dSArnd Bergmann break; 30471b9114dSArnd Bergmann 30571b9114dSArnd Bergmann case IRQ_TYPE_LEVEL_LOW: 30671b9114dSArnd Bergmann newvalue = S3C2410_EXTINT_LOWLEV; 30771b9114dSArnd Bergmann break; 30871b9114dSArnd Bergmann 30971b9114dSArnd Bergmann case IRQ_TYPE_LEVEL_HIGH: 31071b9114dSArnd Bergmann newvalue = S3C2410_EXTINT_HILEV; 31171b9114dSArnd Bergmann break; 31271b9114dSArnd Bergmann 31371b9114dSArnd Bergmann default: 31471b9114dSArnd Bergmann printk(KERN_ERR "No such irq type %d", type); 31571b9114dSArnd Bergmann return -1; 31671b9114dSArnd Bergmann } 31771b9114dSArnd Bergmann 31871b9114dSArnd Bergmann if (offs <= 15) 31971b9114dSArnd Bergmann shift = (offs / 2) * 4; 32071b9114dSArnd Bergmann else 32171b9114dSArnd Bergmann shift = ((offs - 16) / 2) * 4; 32271b9114dSArnd Bergmann mask = 0x7 << shift; 32371b9114dSArnd Bergmann 32471b9114dSArnd Bergmann ctrl = __raw_readl(reg); 32571b9114dSArnd Bergmann ctrl &= ~mask; 32671b9114dSArnd Bergmann ctrl |= newvalue << shift; 32771b9114dSArnd Bergmann __raw_writel(ctrl, reg); 32871b9114dSArnd Bergmann 32971b9114dSArnd Bergmann /* set the GPIO pin appropriately */ 33071b9114dSArnd Bergmann 33171b9114dSArnd Bergmann if (offs < 16) { 33271b9114dSArnd Bergmann pin = S3C64XX_GPN(offs); 33371b9114dSArnd Bergmann pin_val = S3C_GPIO_SFN(2); 33471b9114dSArnd Bergmann } else if (offs < 23) { 33571b9114dSArnd Bergmann pin = S3C64XX_GPL(offs + 8 - 16); 33671b9114dSArnd Bergmann pin_val = S3C_GPIO_SFN(3); 33771b9114dSArnd Bergmann } else { 33871b9114dSArnd Bergmann pin = S3C64XX_GPM(offs - 23); 33971b9114dSArnd Bergmann pin_val = S3C_GPIO_SFN(3); 34071b9114dSArnd Bergmann } 34171b9114dSArnd Bergmann 34271b9114dSArnd Bergmann s3c_gpio_cfgpin(pin, pin_val); 34371b9114dSArnd Bergmann 34471b9114dSArnd Bergmann return 0; 34571b9114dSArnd Bergmann } 34671b9114dSArnd Bergmann 34771b9114dSArnd Bergmann static struct irq_chip s3c_irq_eint = { 34871b9114dSArnd Bergmann .name = "s3c-eint", 34971b9114dSArnd Bergmann .irq_mask = s3c_irq_eint_mask, 35071b9114dSArnd Bergmann .irq_unmask = s3c_irq_eint_unmask, 35171b9114dSArnd Bergmann .irq_mask_ack = s3c_irq_eint_maskack, 35271b9114dSArnd Bergmann .irq_ack = s3c_irq_eint_ack, 35371b9114dSArnd Bergmann .irq_set_type = s3c_irq_eint_set_type, 35471b9114dSArnd Bergmann .irq_set_wake = s3c_irqext_wake, 35571b9114dSArnd Bergmann }; 35671b9114dSArnd Bergmann 35771b9114dSArnd Bergmann /* s3c_irq_demux_eint 35871b9114dSArnd Bergmann * 35971b9114dSArnd Bergmann * This function demuxes the IRQ from the group0 external interrupts, 36071b9114dSArnd Bergmann * from IRQ_EINT(0) to IRQ_EINT(27). It is designed to be inlined into 36171b9114dSArnd Bergmann * the specific handlers s3c_irq_demux_eintX_Y. 36271b9114dSArnd Bergmann */ 36371b9114dSArnd Bergmann static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end) 36471b9114dSArnd Bergmann { 36571b9114dSArnd Bergmann u32 status = __raw_readl(S3C64XX_EINT0PEND); 36671b9114dSArnd Bergmann u32 mask = __raw_readl(S3C64XX_EINT0MASK); 36771b9114dSArnd Bergmann unsigned int irq; 36871b9114dSArnd Bergmann 36971b9114dSArnd Bergmann status &= ~mask; 37071b9114dSArnd Bergmann status >>= start; 37171b9114dSArnd Bergmann status &= (1 << (end - start + 1)) - 1; 37271b9114dSArnd Bergmann 37371b9114dSArnd Bergmann for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { 37471b9114dSArnd Bergmann if (status & 1) 37571b9114dSArnd Bergmann generic_handle_irq(irq); 37671b9114dSArnd Bergmann 37771b9114dSArnd Bergmann status >>= 1; 37871b9114dSArnd Bergmann } 37971b9114dSArnd Bergmann } 38071b9114dSArnd Bergmann 38171b9114dSArnd Bergmann static void s3c_irq_demux_eint0_3(struct irq_desc *desc) 38271b9114dSArnd Bergmann { 38371b9114dSArnd Bergmann s3c_irq_demux_eint(0, 3); 38471b9114dSArnd Bergmann } 38571b9114dSArnd Bergmann 38671b9114dSArnd Bergmann static void s3c_irq_demux_eint4_11(struct irq_desc *desc) 38771b9114dSArnd Bergmann { 38871b9114dSArnd Bergmann s3c_irq_demux_eint(4, 11); 38971b9114dSArnd Bergmann } 39071b9114dSArnd Bergmann 39171b9114dSArnd Bergmann static void s3c_irq_demux_eint12_19(struct irq_desc *desc) 39271b9114dSArnd Bergmann { 39371b9114dSArnd Bergmann s3c_irq_demux_eint(12, 19); 39471b9114dSArnd Bergmann } 39571b9114dSArnd Bergmann 39671b9114dSArnd Bergmann static void s3c_irq_demux_eint20_27(struct irq_desc *desc) 39771b9114dSArnd Bergmann { 39871b9114dSArnd Bergmann s3c_irq_demux_eint(20, 27); 39971b9114dSArnd Bergmann } 40071b9114dSArnd Bergmann 40171b9114dSArnd Bergmann static int __init s3c64xx_init_irq_eint(void) 40271b9114dSArnd Bergmann { 40371b9114dSArnd Bergmann int irq; 40471b9114dSArnd Bergmann 40571b9114dSArnd Bergmann /* On DT-enabled systems EINTs are handled by pinctrl-s3c64xx driver. */ 40671b9114dSArnd Bergmann if (of_have_populated_dt() || !soc_is_s3c64xx()) 40771b9114dSArnd Bergmann return -ENODEV; 40871b9114dSArnd Bergmann 40971b9114dSArnd Bergmann for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { 41071b9114dSArnd Bergmann irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq); 41171b9114dSArnd Bergmann irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq)); 41271b9114dSArnd Bergmann irq_clear_status_flags(irq, IRQ_NOREQUEST); 41371b9114dSArnd Bergmann } 41471b9114dSArnd Bergmann 41571b9114dSArnd Bergmann irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3); 41671b9114dSArnd Bergmann irq_set_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11); 41771b9114dSArnd Bergmann irq_set_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19); 41871b9114dSArnd Bergmann irq_set_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27); 41971b9114dSArnd Bergmann 42071b9114dSArnd Bergmann return 0; 42171b9114dSArnd Bergmann } 42271b9114dSArnd Bergmann arch_initcall(s3c64xx_init_irq_eint); 423