1*71b9114dSArnd Bergmann /* SPDX-License-Identifier: GPL-2.0-only */ 2*71b9114dSArnd Bergmann /* 3*71b9114dSArnd Bergmann * Copyright 2008 Openmoko, Inc. 4*71b9114dSArnd Bergmann * Copyright 2008 Simtec Electronics 5*71b9114dSArnd Bergmann * http://armlinux.simtec.co.uk/ 6*71b9114dSArnd Bergmann * Ben Dooks <ben@simtec.co.uk> 7*71b9114dSArnd Bergmann * 8*71b9114dSArnd Bergmann * S3C64XX - syscon power and sleep control registers 9*71b9114dSArnd Bergmann */ 10*71b9114dSArnd Bergmann 11*71b9114dSArnd Bergmann #ifndef __MACH_S3C64XX_REGS_SYSCON_POWER_H 12*71b9114dSArnd Bergmann #define __MACH_S3C64XX_REGS_SYSCON_POWER_H __FILE__ 13*71b9114dSArnd Bergmann 14*71b9114dSArnd Bergmann #define S3C64XX_PWR_CFG S3C_SYSREG(0x804) 15*71b9114dSArnd Bergmann 16*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_OSC_OTG_DISABLE (1 << 17) 17*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_MMC2_DISABLE (1 << 16) 18*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_MMC1_DISABLE (1 << 15) 19*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_MMC0_DISABLE (1 << 14) 20*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_HSI_DISABLE (1 << 13) 21*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_TS_DISABLE (1 << 12) 22*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_RTC_TICK_DISABLE (1 << 11) 23*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_RTC_ALARM_DISABLE (1 << 10) 24*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_MSM_DISABLE (1 << 9) 25*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_KEY_DISABLE (1 << 8) 26*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_BATF_DISABLE (1 << 7) 27*71b9114dSArnd Bergmann 28*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_WFI_MASK (0x3 << 5) 29*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_WFI_SHIFT (5) 30*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_WFI_IGNORE (0x0 << 5) 31*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_WFI_IDLE (0x1 << 5) 32*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_WFI_STOP (0x2 << 5) 33*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_WFI_SLEEP (0x3 << 5) 34*71b9114dSArnd Bergmann 35*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_BATFLT_MASK (0x3 << 3) 36*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_BATFLT_SHIFT (3) 37*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_BATFLT_IGNORE (0x0 << 3) 38*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_BATFLT_IRQ (0x1 << 3) 39*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_BATFLT_SLEEP (0x3 << 3) 40*71b9114dSArnd Bergmann 41*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_CFG_BAT_WAKE (1 << 2) 42*71b9114dSArnd Bergmann #define S3C64XX_PWRCFG_OSC27_EN (1 << 0) 43*71b9114dSArnd Bergmann 44*71b9114dSArnd Bergmann #define S3C64XX_EINT_MASK S3C_SYSREG(0x808) 45*71b9114dSArnd Bergmann 46*71b9114dSArnd Bergmann #define S3C64XX_NORMAL_CFG S3C_SYSREG(0x810) 47*71b9114dSArnd Bergmann 48*71b9114dSArnd Bergmann #define S3C64XX_NORMALCFG_IROM_ON (1 << 30) 49*71b9114dSArnd Bergmann #define S3C64XX_NORMALCFG_DOMAIN_ETM_ON (1 << 16) 50*71b9114dSArnd Bergmann #define S3C64XX_NORMALCFG_DOMAIN_S_ON (1 << 15) 51*71b9114dSArnd Bergmann #define S3C64XX_NORMALCFG_DOMAIN_F_ON (1 << 14) 52*71b9114dSArnd Bergmann #define S3C64XX_NORMALCFG_DOMAIN_P_ON (1 << 13) 53*71b9114dSArnd Bergmann #define S3C64XX_NORMALCFG_DOMAIN_I_ON (1 << 12) 54*71b9114dSArnd Bergmann #define S3C64XX_NORMALCFG_DOMAIN_G_ON (1 << 10) 55*71b9114dSArnd Bergmann #define S3C64XX_NORMALCFG_DOMAIN_V_ON (1 << 9) 56*71b9114dSArnd Bergmann 57*71b9114dSArnd Bergmann #define S3C64XX_STOP_CFG S3C_SYSREG(0x814) 58*71b9114dSArnd Bergmann 59*71b9114dSArnd Bergmann #define S3C64XX_STOPCFG_MEMORY_ARM_ON (1 << 29) 60*71b9114dSArnd Bergmann #define S3C64XX_STOPCFG_TOP_MEMORY_ON (1 << 20) 61*71b9114dSArnd Bergmann #define S3C64XX_STOPCFG_ARM_LOGIC_ON (1 << 17) 62*71b9114dSArnd Bergmann #define S3C64XX_STOPCFG_TOP_LOGIC_ON (1 << 8) 63*71b9114dSArnd Bergmann #define S3C64XX_STOPCFG_OSC_EN (1 << 0) 64*71b9114dSArnd Bergmann 65*71b9114dSArnd Bergmann #define S3C64XX_SLEEP_CFG S3C_SYSREG(0x818) 66*71b9114dSArnd Bergmann 67*71b9114dSArnd Bergmann #define S3C64XX_SLEEPCFG_OSC_EN (1 << 0) 68*71b9114dSArnd Bergmann 69*71b9114dSArnd Bergmann #define S3C64XX_STOP_MEM_CFG S3C_SYSREG(0x81c) 70*71b9114dSArnd Bergmann 71*71b9114dSArnd Bergmann #define S3C64XX_STOPMEMCFG_MODEMIF_RETAIN (1 << 6) 72*71b9114dSArnd Bergmann #define S3C64XX_STOPMEMCFG_HOSTIF_RETAIN (1 << 5) 73*71b9114dSArnd Bergmann #define S3C64XX_STOPMEMCFG_OTG_RETAIN (1 << 4) 74*71b9114dSArnd Bergmann #define S3C64XX_STOPMEMCFG_HSMCC_RETAIN (1 << 3) 75*71b9114dSArnd Bergmann #define S3C64XX_STOPMEMCFG_IROM_RETAIN (1 << 2) 76*71b9114dSArnd Bergmann #define S3C64XX_STOPMEMCFG_IRDA_RETAIN (1 << 1) 77*71b9114dSArnd Bergmann #define S3C64XX_STOPMEMCFG_NFCON_RETAIN (1 << 0) 78*71b9114dSArnd Bergmann 79*71b9114dSArnd Bergmann #define S3C64XX_OSC_STABLE S3C_SYSREG(0x824) 80*71b9114dSArnd Bergmann #define S3C64XX_PWR_STABLE S3C_SYSREG(0x828) 81*71b9114dSArnd Bergmann 82*71b9114dSArnd Bergmann #define S3C64XX_WAKEUP_STAT S3C_SYSREG(0x908) 83*71b9114dSArnd Bergmann 84*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_MMC2 (1 << 11) 85*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_MMC1 (1 << 10) 86*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_MMC0 (1 << 9) 87*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_HSI (1 << 8) 88*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_BATFLT (1 << 6) 89*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_MSM (1 << 5) 90*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_KEY (1 << 4) 91*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_TS (1 << 3) 92*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_RTC_TICK (1 << 2) 93*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_RTC_ALARM (1 << 1) 94*71b9114dSArnd Bergmann #define S3C64XX_WAKEUPSTAT_EINT (1 << 0) 95*71b9114dSArnd Bergmann 96*71b9114dSArnd Bergmann #define S3C64XX_BLK_PWR_STAT S3C_SYSREG(0x90c) 97*71b9114dSArnd Bergmann 98*71b9114dSArnd Bergmann #define S3C64XX_BLKPWRSTAT_G (1 << 7) 99*71b9114dSArnd Bergmann #define S3C64XX_BLKPWRSTAT_ETM (1 << 6) 100*71b9114dSArnd Bergmann #define S3C64XX_BLKPWRSTAT_S (1 << 5) 101*71b9114dSArnd Bergmann #define S3C64XX_BLKPWRSTAT_F (1 << 4) 102*71b9114dSArnd Bergmann #define S3C64XX_BLKPWRSTAT_P (1 << 3) 103*71b9114dSArnd Bergmann #define S3C64XX_BLKPWRSTAT_I (1 << 2) 104*71b9114dSArnd Bergmann #define S3C64XX_BLKPWRSTAT_V (1 << 1) 105*71b9114dSArnd Bergmann #define S3C64XX_BLKPWRSTAT_TOP (1 << 0) 106*71b9114dSArnd Bergmann 107*71b9114dSArnd Bergmann #define S3C64XX_INFORM0 S3C_SYSREG(0xA00) 108*71b9114dSArnd Bergmann #define S3C64XX_INFORM1 S3C_SYSREG(0xA04) 109*71b9114dSArnd Bergmann #define S3C64XX_INFORM2 S3C_SYSREG(0xA08) 110*71b9114dSArnd Bergmann #define S3C64XX_INFORM3 S3C_SYSREG(0xA0C) 111*71b9114dSArnd Bergmann 112*71b9114dSArnd Bergmann #endif /* __MACH_S3C64XX_REGS_SYSCON_POWER_H */ 113