1*c6ff132dSArnd Bergmann /* SPDX-License-Identifier: GPL-2.0 */ 2*c6ff132dSArnd Bergmann /* 3*c6ff132dSArnd Bergmann * Copyright 2008 Openmoko, Inc. 4*c6ff132dSArnd Bergmann * Copyright 2008 Simtec Electronics 5*c6ff132dSArnd Bergmann * Ben Dooks <ben@simtec.co.uk> 6*c6ff132dSArnd Bergmann * http://armlinux.simtec.co.uk/ 7*c6ff132dSArnd Bergmann * 8*c6ff132dSArnd Bergmann * S3C64XX clock register definitions 9*c6ff132dSArnd Bergmann */ 10*c6ff132dSArnd Bergmann 11*c6ff132dSArnd Bergmann #ifndef __PLAT_REGS_CLOCK_H 12*c6ff132dSArnd Bergmann #define __PLAT_REGS_CLOCK_H __FILE__ 13*c6ff132dSArnd Bergmann 14*c6ff132dSArnd Bergmann /* 15*c6ff132dSArnd Bergmann * FIXME: Remove remaining definitions 16*c6ff132dSArnd Bergmann */ 17*c6ff132dSArnd Bergmann 18*c6ff132dSArnd Bergmann #define S3C_CLKREG(x) (S3C_VA_SYS + (x)) 19*c6ff132dSArnd Bergmann 20*c6ff132dSArnd Bergmann #define S3C_PCLK_GATE S3C_CLKREG(0x34) 21*c6ff132dSArnd Bergmann #define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) 22*c6ff132dSArnd Bergmann #define S3C_MEM_SYS_CFG S3C_CLKREG(0x120) 23*c6ff132dSArnd Bergmann 24*c6ff132dSArnd Bergmann /* PCLK GATE Registers */ 25*c6ff132dSArnd Bergmann #define S3C_CLKCON_PCLK_UART3 (1<<4) 26*c6ff132dSArnd Bergmann #define S3C_CLKCON_PCLK_UART2 (1<<3) 27*c6ff132dSArnd Bergmann #define S3C_CLKCON_PCLK_UART1 (1<<2) 28*c6ff132dSArnd Bergmann #define S3C_CLKCON_PCLK_UART0 (1<<1) 29*c6ff132dSArnd Bergmann 30*c6ff132dSArnd Bergmann /* MEM_SYS_CFG */ 31*c6ff132dSArnd Bergmann #define MEM_SYS_CFG_INDEP_CF 0x4000 32*c6ff132dSArnd Bergmann #define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30 33*c6ff132dSArnd Bergmann 34*c6ff132dSArnd Bergmann #endif /* _PLAT_REGS_CLOCK_H */ 35