1726d8c96SArnd Bergmann /* SPDX-License-Identifier: GPL-2.0-only */ 2726d8c96SArnd Bergmann /* 3726d8c96SArnd Bergmann * Hardware specific definitions for SL-Cx000 series of PDAs 4726d8c96SArnd Bergmann * 5726d8c96SArnd Bergmann * Copyright (c) 2005 Alexander Wykes 6726d8c96SArnd Bergmann * Copyright (c) 2005 Richard Purdie 7726d8c96SArnd Bergmann * 8726d8c96SArnd Bergmann * Based on Sharp's 2.4 kernel patches 9726d8c96SArnd Bergmann */ 10726d8c96SArnd Bergmann #ifndef __ASM_ARCH_SPITZ_H 11726d8c96SArnd Bergmann #define __ASM_ARCH_SPITZ_H 1 12726d8c96SArnd Bergmann #endif 13726d8c96SArnd Bergmann 14*e6acc406SArnd Bergmann #include "irqs.h" /* PXA_NR_BUILTIN_GPIO, PXA_GPIO_TO_IRQ */ 15726d8c96SArnd Bergmann #include <linux/fb.h> 16726d8c96SArnd Bergmann 17726d8c96SArnd Bergmann /* Spitz/Akita GPIOs */ 18726d8c96SArnd Bergmann 19726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_INT (0) /* Key Interrupt */ 20726d8c96SArnd Bergmann #define SPITZ_GPIO_RESET (1) 21726d8c96SArnd Bergmann #define SPITZ_GPIO_nSD_DETECT (9) 22726d8c96SArnd Bergmann #define SPITZ_GPIO_TP_INT (11) /* Touch Panel interrupt */ 23726d8c96SArnd Bergmann #define SPITZ_GPIO_AK_INT (13) /* Remote Control */ 24726d8c96SArnd Bergmann #define SPITZ_GPIO_ADS7846_CS (14) 25726d8c96SArnd Bergmann #define SPITZ_GPIO_SYNC (16) 26726d8c96SArnd Bergmann #define SPITZ_GPIO_MAX1111_CS (20) 27726d8c96SArnd Bergmann #define SPITZ_GPIO_FATAL_BAT (21) 28726d8c96SArnd Bergmann #define SPITZ_GPIO_HSYNC (22) 29726d8c96SArnd Bergmann #define SPITZ_GPIO_nSD_CLK (32) 30726d8c96SArnd Bergmann #define SPITZ_GPIO_USB_DEVICE (35) 31726d8c96SArnd Bergmann #define SPITZ_GPIO_USB_HOST (37) 32726d8c96SArnd Bergmann #define SPITZ_GPIO_USB_CONNECT (41) 33726d8c96SArnd Bergmann #define SPITZ_GPIO_LCDCON_CS (53) 34726d8c96SArnd Bergmann #define SPITZ_GPIO_nPCE (54) 35726d8c96SArnd Bergmann #define SPITZ_GPIO_nSD_WP (81) 36726d8c96SArnd Bergmann #define SPITZ_GPIO_ON_RESET (89) 37726d8c96SArnd Bergmann #define SPITZ_GPIO_BAT_COVER (90) 38726d8c96SArnd Bergmann #define SPITZ_GPIO_CF_CD (94) 39726d8c96SArnd Bergmann #define SPITZ_GPIO_ON_KEY (95) 40726d8c96SArnd Bergmann #define SPITZ_GPIO_SWA (97) 41726d8c96SArnd Bergmann #define SPITZ_GPIO_SWB (96) 42726d8c96SArnd Bergmann #define SPITZ_GPIO_CHRG_FULL (101) 43726d8c96SArnd Bergmann #define SPITZ_GPIO_CO (101) 44726d8c96SArnd Bergmann #define SPITZ_GPIO_CF_IRQ (105) 45726d8c96SArnd Bergmann #define SPITZ_GPIO_AC_IN (115) 46726d8c96SArnd Bergmann #define SPITZ_GPIO_HP_IN (116) 47726d8c96SArnd Bergmann 48726d8c96SArnd Bergmann /* Spitz Only GPIOs */ 49726d8c96SArnd Bergmann 50726d8c96SArnd Bergmann #define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */ 51726d8c96SArnd Bergmann #define SPITZ_GPIO_CF2_CD (93) 52726d8c96SArnd Bergmann 53726d8c96SArnd Bergmann 54726d8c96SArnd Bergmann /* Spitz/Akita Keyboard Definitions */ 55726d8c96SArnd Bergmann 56726d8c96SArnd Bergmann #define SPITZ_KEY_STROBE_NUM (11) 57726d8c96SArnd Bergmann #define SPITZ_KEY_SENSE_NUM (7) 58726d8c96SArnd Bergmann #define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000 59726d8c96SArnd Bergmann #define SPITZ_GPIO_G1_STROBE_BIT 0x00100000 60726d8c96SArnd Bergmann #define SPITZ_GPIO_G2_STROBE_BIT 0x01000000 61726d8c96SArnd Bergmann #define SPITZ_GPIO_G3_STROBE_BIT 0x00041880 62726d8c96SArnd Bergmann #define SPITZ_GPIO_G0_SENSE_BIT 0x00021000 63726d8c96SArnd Bergmann #define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4 64726d8c96SArnd Bergmann #define SPITZ_GPIO_G2_SENSE_BIT 0x08000000 65726d8c96SArnd Bergmann #define SPITZ_GPIO_G3_SENSE_BIT 0x00000000 66726d8c96SArnd Bergmann 67726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE0 88 68726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE1 23 69726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE2 24 70726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE3 25 71726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE4 26 72726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE5 27 73726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE6 52 74726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE7 103 75726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE8 107 76726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE9 108 77726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_STROBE10 114 78726d8c96SArnd Bergmann 79726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_SENSE0 12 80726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_SENSE1 17 81726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_SENSE2 91 82726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_SENSE3 34 83726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_SENSE4 36 84726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_SENSE5 38 85726d8c96SArnd Bergmann #define SPITZ_GPIO_KEY_SENSE6 39 86726d8c96SArnd Bergmann 87726d8c96SArnd Bergmann 88726d8c96SArnd Bergmann /* Spitz Scoop Device (No. 1) GPIOs */ 89726d8c96SArnd Bergmann /* Suspend States in comments */ 90726d8c96SArnd Bergmann #define SPITZ_SCP_LED_GREEN SCOOP_GPCR_PA11 /* Keep */ 91726d8c96SArnd Bergmann #define SPITZ_SCP_JK_B SCOOP_GPCR_PA12 /* Keep */ 92726d8c96SArnd Bergmann #define SPITZ_SCP_CHRG_ON SCOOP_GPCR_PA13 /* Keep */ 93726d8c96SArnd Bergmann #define SPITZ_SCP_MUTE_L SCOOP_GPCR_PA14 /* Low */ 94726d8c96SArnd Bergmann #define SPITZ_SCP_MUTE_R SCOOP_GPCR_PA15 /* Low */ 95726d8c96SArnd Bergmann #define SPITZ_SCP_CF_POWER SCOOP_GPCR_PA16 /* Keep */ 96726d8c96SArnd Bergmann #define SPITZ_SCP_LED_ORANGE SCOOP_GPCR_PA17 /* Keep */ 97726d8c96SArnd Bergmann #define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ 98726d8c96SArnd Bergmann #define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ 99726d8c96SArnd Bergmann 100726d8c96SArnd Bergmann #define SPITZ_SCP_IO_DIR (SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ 101726d8c96SArnd Bergmann SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | \ 102726d8c96SArnd Bergmann SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 103726d8c96SArnd Bergmann #define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) 104726d8c96SArnd Bergmann #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 105726d8c96SArnd Bergmann #define SPITZ_SCP_SUS_SET 0 106726d8c96SArnd Bergmann 107726d8c96SArnd Bergmann #define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) 108726d8c96SArnd Bergmann #define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) 109726d8c96SArnd Bergmann #define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) 110726d8c96SArnd Bergmann #define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) 111726d8c96SArnd Bergmann #define SPITZ_GPIO_MUTE_L (SPITZ_SCP_GPIO_BASE + 3) 112726d8c96SArnd Bergmann #define SPITZ_GPIO_MUTE_R (SPITZ_SCP_GPIO_BASE + 4) 113726d8c96SArnd Bergmann #define SPITZ_GPIO_CF_POWER (SPITZ_SCP_GPIO_BASE + 5) 114726d8c96SArnd Bergmann #define SPITZ_GPIO_LED_ORANGE (SPITZ_SCP_GPIO_BASE + 6) 115726d8c96SArnd Bergmann #define SPITZ_GPIO_JK_A (SPITZ_SCP_GPIO_BASE + 7) 116726d8c96SArnd Bergmann #define SPITZ_GPIO_ADC_TEMP_ON (SPITZ_SCP_GPIO_BASE + 8) 117726d8c96SArnd Bergmann 118726d8c96SArnd Bergmann /* Spitz Scoop Device (No. 2) GPIOs */ 119726d8c96SArnd Bergmann /* Suspend States in comments */ 120726d8c96SArnd Bergmann #define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ 121726d8c96SArnd Bergmann #define SPITZ_SCP2_AKIN_PULLUP SCOOP_GPCR_PA12 /* Keep */ 122726d8c96SArnd Bergmann #define SPITZ_SCP2_RESERVED_1 SCOOP_GPCR_PA13 /* High */ 123726d8c96SArnd Bergmann #define SPITZ_SCP2_RESERVED_2 SCOOP_GPCR_PA14 /* Low */ 124726d8c96SArnd Bergmann #define SPITZ_SCP2_RESERVED_3 SCOOP_GPCR_PA15 /* Low */ 125726d8c96SArnd Bergmann #define SPITZ_SCP2_RESERVED_4 SCOOP_GPCR_PA16 /* Low */ 126726d8c96SArnd Bergmann #define SPITZ_SCP2_BACKLIGHT_CONT SCOOP_GPCR_PA17 /* Low */ 127726d8c96SArnd Bergmann #define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ 128726d8c96SArnd Bergmann #define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ 129726d8c96SArnd Bergmann 130726d8c96SArnd Bergmann #define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ 131726d8c96SArnd Bergmann SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ 132726d8c96SArnd Bergmann SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 133726d8c96SArnd Bergmann 134726d8c96SArnd Bergmann #define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) 135726d8c96SArnd Bergmann #define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ 136726d8c96SArnd Bergmann SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 137726d8c96SArnd Bergmann #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) 138726d8c96SArnd Bergmann 139726d8c96SArnd Bergmann #define SPITZ_SCP2_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12) 140726d8c96SArnd Bergmann #define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) 141726d8c96SArnd Bergmann #define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1) 142726d8c96SArnd Bergmann #define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) 143726d8c96SArnd Bergmann #define SPITZ_GPIO_RESERVED_2 (SPITZ_SCP2_GPIO_BASE + 3) 144726d8c96SArnd Bergmann #define SPITZ_GPIO_RESERVED_3 (SPITZ_SCP2_GPIO_BASE + 4) 145726d8c96SArnd Bergmann #define SPITZ_GPIO_RESERVED_4 (SPITZ_SCP2_GPIO_BASE + 5) 146726d8c96SArnd Bergmann #define SPITZ_GPIO_BACKLIGHT_CONT (SPITZ_SCP2_GPIO_BASE + 6) 147726d8c96SArnd Bergmann #define SPITZ_GPIO_BACKLIGHT_ON (SPITZ_SCP2_GPIO_BASE + 7) 148726d8c96SArnd Bergmann #define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) 149726d8c96SArnd Bergmann 150726d8c96SArnd Bergmann /* Akita IO Expander GPIOs */ 151726d8c96SArnd Bergmann #define AKITA_IOEXP_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12) 152726d8c96SArnd Bergmann #define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) 153726d8c96SArnd Bergmann #define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) 154726d8c96SArnd Bergmann #define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) 155726d8c96SArnd Bergmann #define AKITA_GPIO_BACKLIGHT_ON (AKITA_IOEXP_GPIO_BASE + 3) 156726d8c96SArnd Bergmann #define AKITA_GPIO_BACKLIGHT_CONT (AKITA_IOEXP_GPIO_BASE + 4) 157726d8c96SArnd Bergmann #define AKITA_GPIO_AKIN_PULLUP (AKITA_IOEXP_GPIO_BASE + 5) 158726d8c96SArnd Bergmann #define AKITA_GPIO_IR_ON (AKITA_IOEXP_GPIO_BASE + 6) 159726d8c96SArnd Bergmann #define AKITA_GPIO_RESERVED_7 (AKITA_IOEXP_GPIO_BASE + 7) 160726d8c96SArnd Bergmann 161726d8c96SArnd Bergmann /* Spitz IRQ Definitions */ 162726d8c96SArnd Bergmann 163726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT) 164726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN) 165726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT) 166726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN) 167726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT) 168726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC) 169726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY) 170726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_SWA PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA) 171726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_SWB PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB) 172726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_BAT_COVER PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER) 173726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_FATAL_BAT PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT) 174726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO) 175726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ) 176726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD) 177726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_CF2_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ) 178726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT) 179726d8c96SArnd Bergmann #define SPITZ_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT) 180726d8c96SArnd Bergmann 181726d8c96SArnd Bergmann /* 182726d8c96SArnd Bergmann * Shared data structures 183726d8c96SArnd Bergmann */ 184726d8c96SArnd Bergmann extern struct platform_device spitzssp_device; 185726d8c96SArnd Bergmann extern struct sharpsl_charger_machinfo spitz_pm_machinfo; 186