xref: /linux/arch/arm/mach-pxa/pxa25x.c (revision f3d9478b2ce468c3115b02ecae7e975990697f15)
1 /*
2  *  linux/arch/arm/mach-pxa/pxa25x.c
3  *
4  *  Author:	Nicolas Pitre
5  *  Created:	Jun 15, 2001
6  *  Copyright:	MontaVista Software Inc.
7  *
8  * Code specific to PXA21x/25x/26x variants.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  *
14  * Since this file should be linked before any other machine specific file,
15  * the __initcall() here will be executed first.  This serves as default
16  * initialization stuff for PXA machines which can be overridden later if
17  * need be.
18  */
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/pm.h>
24 
25 #include <asm/hardware.h>
26 #include <asm/arch/pxa-regs.h>
27 
28 #include "generic.h"
29 
30 /*
31  * Various clock factors driven by the CCCR register.
32  */
33 
34 /* Crystal Frequency to Memory Frequency Multiplier (L) */
35 static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
36 
37 /* Memory Frequency to Run Mode Frequency Multiplier (M) */
38 static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
39 
40 /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
41 /* Note: we store the value N * 2 here. */
42 static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
43 
44 /* Crystal clock */
45 #define BASE_CLK	3686400
46 
47 /*
48  * Get the clock frequency as reflected by CCCR and the turbo flag.
49  * We assume these values have been applied via a fcs.
50  * If info is not 0 we also display the current settings.
51  */
52 unsigned int get_clk_frequency_khz(int info)
53 {
54 	unsigned long cccr, turbo;
55 	unsigned int l, L, m, M, n2, N;
56 
57 	cccr = CCCR;
58 	asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );
59 
60 	l  =  L_clk_mult[(cccr >> 0) & 0x1f];
61 	m  =  M_clk_mult[(cccr >> 5) & 0x03];
62 	n2 = N2_clk_mult[(cccr >> 7) & 0x07];
63 
64 	L = l * BASE_CLK;
65 	M = m * L;
66 	N = n2 * M / 2;
67 
68 	if(info)
69 	{
70 		L += 5000;
71 		printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
72 			L / 1000000, (L % 1000000) / 10000, l );
73 		M += 5000;
74 		printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
75 			M / 1000000, (M % 1000000) / 10000, m );
76 		N += 5000;
77 		printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
78 			N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
79 			(turbo & 1) ? "" : "in" );
80 	}
81 
82 	return (turbo & 1) ? (N/1000) : (M/1000);
83 }
84 
85 EXPORT_SYMBOL(get_clk_frequency_khz);
86 
87 /*
88  * Return the current memory clock frequency in units of 10kHz
89  */
90 unsigned int get_memclk_frequency_10khz(void)
91 {
92 	return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
93 }
94 
95 EXPORT_SYMBOL(get_memclk_frequency_10khz);
96 
97 /*
98  * Return the current LCD clock frequency in units of 10kHz
99  */
100 unsigned int get_lcdclk_frequency_10khz(void)
101 {
102 	return get_memclk_frequency_10khz();
103 }
104 
105 EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
106 
107 #ifdef CONFIG_PM
108 
109 int pxa_cpu_pm_prepare(suspend_state_t state)
110 {
111 	switch (state) {
112 	case PM_SUSPEND_MEM:
113 		break;
114 	default:
115 		return -EINVAL;
116 	}
117 
118 	return 0;
119 }
120 
121 void pxa_cpu_pm_enter(suspend_state_t state)
122 {
123 	extern void pxa_cpu_suspend(unsigned int);
124 	extern void pxa_cpu_resume(void);
125 
126 	CKEN = 0;
127 
128 	switch (state) {
129 	case PM_SUSPEND_MEM:
130 		/* set resume return address */
131 		PSPR = virt_to_phys(pxa_cpu_resume);
132 		pxa_cpu_suspend(PWRMODE_SLEEP);
133 		break;
134 	}
135 }
136 
137 #endif
138