xref: /linux/arch/arm/mach-pxa/pxa25x.c (revision 60684c2bd35064043360e6f716d1b7c20e967b7d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  linux/arch/arm/mach-pxa/pxa25x.c
4  *
5  *  Author:	Nicolas Pitre
6  *  Created:	Jun 15, 2001
7  *  Copyright:	MontaVista Software Inc.
8  *
9  * Code specific to PXA21x/25x/26x variants.
10  *
11  * Since this file should be linked before any other machine specific file,
12  * the __initcall() here will be executed first.  This serves as default
13  * initialization stuff for PXA machines which can be overridden later if
14  * need be.
15  */
16 #include <linux/dmaengine.h>
17 #include <linux/dma/pxa-dma.h>
18 #include <linux/gpio.h>
19 #include <linux/gpio-pxa.h>
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/suspend.h>
25 #include <linux/syscore_ops.h>
26 #include <linux/irq.h>
27 #include <linux/irqchip.h>
28 #include <linux/platform_data/mmp_dma.h>
29 #include <linux/soc/pxa/cpu.h>
30 
31 #include <asm/mach/map.h>
32 #include <asm/suspend.h>
33 #include "irqs.h"
34 #include "pxa25x.h"
35 #include "reset.h"
36 #include "pm.h"
37 #include "addr-map.h"
38 #include "smemc.h"
39 
40 #include "generic.h"
41 #include "devices.h"
42 
43 /*
44  * Various clock factors driven by the CCCR register.
45  */
46 
47 #ifdef CONFIG_PM
48 
49 #define SAVE(x)		sleep_save[SLEEP_SAVE_##x] = x
50 #define RESTORE(x)	x = sleep_save[SLEEP_SAVE_##x]
51 
52 /*
53  * List of global PXA peripheral registers to preserve.
54  * More ones like CP and general purpose register values are preserved
55  * with the stack pointer in sleep.S.
56  */
57 enum {
58 	SLEEP_SAVE_PSTR,
59 	SLEEP_SAVE_COUNT
60 };
61 
62 
63 static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
64 {
65 	SAVE(PSTR);
66 }
67 
68 static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
69 {
70 	RESTORE(PSTR);
71 }
72 
73 static void pxa25x_cpu_pm_enter(suspend_state_t state)
74 {
75 	/* Clear reset status */
76 	RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
77 
78 	switch (state) {
79 	case PM_SUSPEND_MEM:
80 		cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
81 		break;
82 	}
83 }
84 
85 static int pxa25x_cpu_pm_prepare(void)
86 {
87 	/* set resume return address */
88 	PSPR = __pa_symbol(cpu_resume);
89 	return 0;
90 }
91 
92 static void pxa25x_cpu_pm_finish(void)
93 {
94 	/* ensure not to come back here if it wasn't intended */
95 	PSPR = 0;
96 }
97 
98 static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
99 	.save_count	= SLEEP_SAVE_COUNT,
100 	.valid		= suspend_valid_only_mem,
101 	.save		= pxa25x_cpu_pm_save,
102 	.restore	= pxa25x_cpu_pm_restore,
103 	.enter		= pxa25x_cpu_pm_enter,
104 	.prepare	= pxa25x_cpu_pm_prepare,
105 	.finish		= pxa25x_cpu_pm_finish,
106 };
107 
108 static void __init pxa25x_init_pm(void)
109 {
110 	pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
111 }
112 #else
113 static inline void pxa25x_init_pm(void) {}
114 #endif
115 
116 /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
117  */
118 
119 static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
120 {
121 	int gpio = pxa_irq_to_gpio(d->irq);
122 	uint32_t mask = 0;
123 
124 	if (gpio >= 0 && gpio < 85)
125 		return gpio_set_wake(gpio, on);
126 
127 	if (d->irq == IRQ_RTCAlrm) {
128 		mask = PWER_RTC;
129 		goto set_pwer;
130 	}
131 
132 	return -EINVAL;
133 
134 set_pwer:
135 	if (on)
136 		PWER |= mask;
137 	else
138 		PWER &=~mask;
139 
140 	return 0;
141 }
142 
143 void __init pxa25x_init_irq(void)
144 {
145 	pxa_init_irq(32, pxa25x_set_wake);
146 }
147 
148 static int __init __init
149 pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent)
150 {
151 	pxa_dt_irq_init(pxa25x_set_wake);
152 	set_handle_irq(icip_handle_irq);
153 
154 	return 0;
155 }
156 IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
157 
158 static struct map_desc pxa25x_io_desc[] __initdata = {
159 	{	/* Mem Ctl */
160 		.virtual	= (unsigned long)SMEMC_VIRT,
161 		.pfn		= __phys_to_pfn(PXA2XX_SMEMC_BASE),
162 		.length		= SMEMC_SIZE,
163 		.type		= MT_DEVICE
164 	}, {	/* UNCACHED_PHYS_0 */
165 		.virtual	= UNCACHED_PHYS_0,
166 		.pfn		= __phys_to_pfn(0x00000000),
167 		.length		= UNCACHED_PHYS_0_SIZE,
168 		.type		= MT_DEVICE
169 	},
170 };
171 
172 void __init pxa25x_map_io(void)
173 {
174 	pxa_map_io();
175 	iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
176 	pxa25x_get_clk_frequency_khz(1);
177 }
178 
179 static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
180 	.irq_base	= PXA_GPIO_TO_IRQ(0),
181 	.gpio_set_wake	= gpio_set_wake,
182 };
183 
184 static struct platform_device *pxa25x_devices[] __initdata = {
185 	&pxa25x_device_udc,
186 	&pxa_device_pmu,
187 	&pxa_device_i2s,
188 	&sa1100_device_rtc,
189 	&pxa25x_device_ssp,
190 	&pxa25x_device_nssp,
191 	&pxa25x_device_assp,
192 	&pxa25x_device_pwm0,
193 	&pxa25x_device_pwm1,
194 	&pxa_device_asoc_platform,
195 };
196 
197 static const struct dma_slave_map pxa25x_slave_map[] = {
198 	/* PXA25x, PXA27x and PXA3xx common entries */
199 	{ "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
200 	{ "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
201 	{ "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
202 	  PDMA_FILTER_PARAM(LOWEST, 10) },
203 	{ "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
204 	{ "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
205 	{ "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
206 	{ "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
207 	{ "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
208 	{ "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
209 	{ "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
210 	{ "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
211 	{ "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
212 	{ "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
213 
214 	/* PXA25x specific map */
215 	{ "pxa25x-ssp.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
216 	{ "pxa25x-ssp.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
217 	{ "pxa25x-nssp.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
218 	{ "pxa25x-nssp.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
219 	{ "pxa25x-nssp.2", "rx", PDMA_FILTER_PARAM(LOWEST, 23) },
220 	{ "pxa25x-nssp.2", "tx", PDMA_FILTER_PARAM(LOWEST, 24) },
221 };
222 
223 static struct mmp_dma_platdata pxa25x_dma_pdata = {
224 	.dma_channels	= 16,
225 	.nb_requestors	= 40,
226 	.slave_map	= pxa25x_slave_map,
227 	.slave_map_cnt	= ARRAY_SIZE(pxa25x_slave_map),
228 };
229 
230 static int __init pxa25x_init(void)
231 {
232 	int ret = 0;
233 
234 	if (cpu_is_pxa25x()) {
235 
236 		pxa_register_wdt(RCSR);
237 
238 		pxa25x_init_pm();
239 
240 		register_syscore_ops(&pxa_irq_syscore_ops);
241 		register_syscore_ops(&pxa2xx_mfp_syscore_ops);
242 
243 		if (!of_have_populated_dt()) {
244 			pxa2xx_set_dmac_info(&pxa25x_dma_pdata);
245 			pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
246 			ret = platform_add_devices(pxa25x_devices,
247 						   ARRAY_SIZE(pxa25x_devices));
248 		}
249 	}
250 
251 	return ret;
252 }
253 
254 postcore_initcall(pxa25x_init);
255