1 /* 2 * PXA250/210 Power Management Routines 3 * 4 * Original code for the SA11x0: 5 * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> 6 * 7 * Modified for the PXA250 by Nicolas Pitre: 8 * Copyright (c) 2002 Monta Vista Software, Inc. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License. 12 */ 13 #include <linux/init.h> 14 #include <linux/module.h> 15 #include <linux/suspend.h> 16 #include <linux/errno.h> 17 #include <linux/time.h> 18 19 #include <asm/hardware.h> 20 #include <asm/memory.h> 21 #include <asm/system.h> 22 #include <asm/arch/pm.h> 23 #include <asm/arch/pxa-regs.h> 24 #include <asm/arch/lubbock.h> 25 #include <asm/mach/time.h> 26 27 28 /* 29 * Debug macros 30 */ 31 #undef DEBUG 32 33 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x 34 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] 35 36 #define RESTORE_GPLEVEL(n) do { \ 37 GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \ 38 GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \ 39 } while (0) 40 41 /* 42 * List of global PXA peripheral registers to preserve. 43 * More ones like CP and general purpose register values are preserved 44 * with the stack pointer in sleep.S. 45 */ 46 enum { SLEEP_SAVE_START = 0, 47 48 SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3, 49 SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3, 50 SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3, 51 SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3, 52 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, 53 54 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, 55 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, 56 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, 57 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U, 58 59 SLEEP_SAVE_PSTR, 60 61 SLEEP_SAVE_ICMR, 62 SLEEP_SAVE_CKEN, 63 64 #ifdef CONFIG_PXA27x 65 SLEEP_SAVE_MDREFR, 66 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, 67 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR, 68 #endif 69 70 SLEEP_SAVE_CKSUM, 71 72 SLEEP_SAVE_SIZE 73 }; 74 75 76 int pxa_pm_enter(suspend_state_t state) 77 { 78 unsigned long sleep_save[SLEEP_SAVE_SIZE]; 79 unsigned long checksum = 0; 80 struct timespec delta, rtc; 81 int i; 82 extern void pxa_cpu_pm_enter(suspend_state_t state); 83 84 #ifdef CONFIG_IWMMXT 85 /* force any iWMMXt context to ram **/ 86 iwmmxt_task_disable(NULL); 87 #endif 88 89 /* preserve current time */ 90 rtc.tv_sec = RCNR; 91 rtc.tv_nsec = 0; 92 save_time_delta(&delta, &rtc); 93 94 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2); 95 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2); 96 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2); 97 SAVE(GFER0); SAVE(GFER1); SAVE(GFER2); 98 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); 99 100 SAVE(GAFR0_L); SAVE(GAFR0_U); 101 SAVE(GAFR1_L); SAVE(GAFR1_U); 102 SAVE(GAFR2_L); SAVE(GAFR2_U); 103 104 #ifdef CONFIG_PXA27x 105 SAVE(MDREFR); 106 SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3); 107 SAVE(GAFR3_L); SAVE(GAFR3_U); 108 SAVE(PWER); SAVE(PCFR); SAVE(PRER); 109 SAVE(PFER); SAVE(PKWR); 110 #endif 111 112 SAVE(ICMR); 113 ICMR = 0; 114 115 SAVE(CKEN); 116 SAVE(PSTR); 117 118 /* Note: wake up source are set up in each machine specific files */ 119 120 /* clear GPIO transition detect bits */ 121 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; 122 #ifdef CONFIG_PXA27x 123 GEDR3 = GEDR3; 124 #endif 125 126 /* Clear sleep reset status */ 127 RCSR = RCSR_SMR; 128 129 /* before sleeping, calculate and save a checksum */ 130 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++) 131 checksum += sleep_save[i]; 132 sleep_save[SLEEP_SAVE_CKSUM] = checksum; 133 134 /* *** go zzz *** */ 135 pxa_cpu_pm_enter(state); 136 137 cpu_init(); 138 139 /* after sleeping, validate the checksum */ 140 checksum = 0; 141 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++) 142 checksum += sleep_save[i]; 143 144 /* if invalid, display message and wait for a hardware reset */ 145 if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) { 146 #ifdef CONFIG_ARCH_LUBBOCK 147 LUB_HEXLED = 0xbadbadc5; 148 #endif 149 while (1) 150 pxa_cpu_pm_enter(state); 151 } 152 153 /* ensure not to come back here if it wasn't intended */ 154 PSPR = 0; 155 156 /* restore registers */ 157 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); 158 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); 159 RESTORE(GAFR0_L); RESTORE(GAFR0_U); 160 RESTORE(GAFR1_L); RESTORE(GAFR1_U); 161 RESTORE(GAFR2_L); RESTORE(GAFR2_U); 162 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); 163 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); 164 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); 165 166 #ifdef CONFIG_PXA27x 167 RESTORE(MDREFR); 168 RESTORE_GPLEVEL(3); RESTORE(GPDR3); 169 RESTORE(GAFR3_L); RESTORE(GAFR3_U); 170 RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); 171 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); 172 RESTORE(PFER); RESTORE(PKWR); 173 #endif 174 175 PSSR = PSSR_RDH | PSSR_PH; 176 177 RESTORE(CKEN); 178 179 ICLR = 0; 180 ICCR = 1; 181 RESTORE(ICMR); 182 183 RESTORE(PSTR); 184 185 /* restore current time */ 186 rtc.tv_sec = RCNR; 187 restore_time_delta(&delta, &rtc); 188 189 #ifdef DEBUG 190 printk(KERN_DEBUG "*** made it back from resume\n"); 191 #endif 192 193 return 0; 194 } 195 196 EXPORT_SYMBOL_GPL(pxa_pm_enter); 197 198 unsigned long sleep_phys_sp(void *sp) 199 { 200 return virt_to_phys(sp); 201 } 202 203 /* 204 * Called after processes are frozen, but before we shut down devices. 205 */ 206 int pxa_pm_prepare(suspend_state_t state) 207 { 208 extern int pxa_cpu_pm_prepare(suspend_state_t state); 209 210 return pxa_cpu_pm_prepare(state); 211 } 212 213 EXPORT_SYMBOL_GPL(pxa_pm_prepare); 214 215 /* 216 * Called after devices are re-setup, but before processes are thawed. 217 */ 218 int pxa_pm_finish(suspend_state_t state) 219 { 220 return 0; 221 } 222 223 EXPORT_SYMBOL_GPL(pxa_pm_finish); 224 225 /* 226 * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk. 227 */ 228 static struct pm_ops pxa_pm_ops = { 229 .pm_disk_mode = PM_DISK_FIRMWARE, 230 .prepare = pxa_pm_prepare, 231 .enter = pxa_pm_enter, 232 .finish = pxa_pm_finish, 233 }; 234 235 static int __init pxa_pm_init(void) 236 { 237 pm_set_ops(&pxa_pm_ops); 238 return 0; 239 } 240 241 device_initcall(pxa_pm_init); 242