xref: /linux/arch/arm/mach-pxa/generic.c (revision fd13f8117f7a2d4054bf420ec1428e918a24a480)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  linux/arch/arm/mach-pxa/generic.c
4  *
5  *  Author:	Nicolas Pitre
6  *  Created:	Jun 15, 2001
7  *  Copyright:	MontaVista Software Inc.
8  *
9  * Code common to all PXA machines.
10  *
11  * Since this file should be linked before any other machine specific file,
12  * the __initcall() here will be executed first.  This serves as default
13  * initialization stuff for PXA machines which can be overridden later if
14  * need be.
15  */
16 #include <linux/gpio.h>
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/soc/pxa/cpu.h>
21 #include <linux/soc/pxa/smemc.h>
22 
23 #include <asm/mach/map.h>
24 #include <asm/mach-types.h>
25 
26 #include "addr-map.h"
27 #include <mach/irqs.h>
28 #include <mach/reset.h>
29 #include <mach/smemc.h>
30 #include <mach/pxa3xx-regs.h>
31 
32 #include "generic.h"
33 #include <clocksource/pxa.h>
34 
35 void clear_reset_status(unsigned int mask)
36 {
37 	if (cpu_is_pxa2xx())
38 		pxa2xx_clear_reset_status(mask);
39 	else {
40 		/* RESET_STATUS_* has a 1:1 mapping with ARSR */
41 		ARSR = mask;
42 	}
43 }
44 
45 /*
46  * For non device-tree builds, keep legacy timer init
47  */
48 void __init pxa_timer_init(void)
49 {
50 	if (cpu_is_pxa25x())
51 		pxa25x_clocks_init();
52 	if (cpu_is_pxa27x())
53 		pxa27x_clocks_init();
54 	if (cpu_is_pxa3xx())
55 		pxa3xx_clocks_init();
56 	pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000));
57 }
58 
59 void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio)
60 {
61 	__raw_writel(mcmem, MCMEM(sock));
62 	__raw_writel(mcatt, MCATT(sock));
63 	__raw_writel(mcio, MCIO(sock));
64 }
65 EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing);
66 
67 void pxa_smemc_set_pcmcia_socket(int nr)
68 {
69 	switch (nr) {
70 	case 0:
71 		__raw_writel(0, MECR);
72 		break;
73 	case 1:
74 		/*
75 		 * We have at least one socket, so set MECR:CIT
76 		 * (Card Is There)
77 		 */
78 		__raw_writel(MECR_CIT, MECR);
79 		break;
80 	case 2:
81 		/* Set CIT and MECR:NOS (Number Of Sockets) */
82 		__raw_writel(MECR_CIT | MECR_NOS, MECR);
83 		break;
84 	}
85 }
86 EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket);
87 
88 void __iomem *pxa_smemc_get_mdrefr(void)
89 {
90 	return MDREFR;
91 }
92 
93 /*
94  * Intel PXA2xx internal register mapping.
95  *
96  * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
97  *       and cache flush area.
98  */
99 static struct map_desc common_io_desc[] __initdata = {
100   	{	/* Devs */
101 		.virtual	= (unsigned long)PERIPH_VIRT,
102 		.pfn		= __phys_to_pfn(PERIPH_PHYS),
103 		.length		= PERIPH_SIZE,
104 		.type		= MT_DEVICE
105 	}
106 };
107 
108 void __init pxa_map_io(void)
109 {
110 	debug_ll_io_init();
111 	iotable_init(ARRAY_AND_SIZE(common_io_desc));
112 }
113