1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/arm/mach-pxa/generic.c 4 * 5 * Author: Nicolas Pitre 6 * Created: Jun 15, 2001 7 * Copyright: MontaVista Software Inc. 8 * 9 * Code common to all PXA machines. 10 * 11 * Since this file should be linked before any other machine specific file, 12 * the __initcall() here will be executed first. This serves as default 13 * initialization stuff for PXA machines which can be overridden later if 14 * need be. 15 */ 16 #include <linux/gpio.h> 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/init.h> 20 #include <linux/soc/pxa/cpu.h> 21 22 #include <asm/mach/map.h> 23 #include <asm/mach-types.h> 24 25 #include "addr-map.h" 26 #include <mach/irqs.h> 27 #include <mach/reset.h> 28 #include <mach/smemc.h> 29 #include <mach/pxa3xx-regs.h> 30 31 #include "generic.h" 32 #include <clocksource/pxa.h> 33 34 void clear_reset_status(unsigned int mask) 35 { 36 if (cpu_is_pxa2xx()) 37 pxa2xx_clear_reset_status(mask); 38 else { 39 /* RESET_STATUS_* has a 1:1 mapping with ARSR */ 40 ARSR = mask; 41 } 42 } 43 44 /* 45 * For non device-tree builds, keep legacy timer init 46 */ 47 void __init pxa_timer_init(void) 48 { 49 if (cpu_is_pxa25x()) 50 pxa25x_clocks_init(); 51 if (cpu_is_pxa27x()) 52 pxa27x_clocks_init(); 53 if (cpu_is_pxa3xx()) 54 pxa3xx_clocks_init(); 55 pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000)); 56 } 57 58 void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio) 59 { 60 __raw_writel(mcmem, MCMEM(sock)); 61 __raw_writel(mcatt, MCATT(sock)); 62 __raw_writel(mcio, MCIO(sock)); 63 } 64 EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing); 65 66 void pxa_smemc_set_pcmcia_socket(int nr) 67 { 68 switch (nr) { 69 case 0: 70 __raw_writel(0, MECR); 71 break; 72 case 1: 73 /* 74 * We have at least one socket, so set MECR:CIT 75 * (Card Is There) 76 */ 77 __raw_writel(MECR_CIT, MECR); 78 break; 79 case 2: 80 /* Set CIT and MECR:NOS (Number Of Sockets) */ 81 __raw_writel(MECR_CIT | MECR_NOS, MECR); 82 break; 83 } 84 } 85 EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket); 86 87 /* 88 * Intel PXA2xx internal register mapping. 89 * 90 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table 91 * and cache flush area. 92 */ 93 static struct map_desc common_io_desc[] __initdata = { 94 { /* Devs */ 95 .virtual = (unsigned long)PERIPH_VIRT, 96 .pfn = __phys_to_pfn(PERIPH_PHYS), 97 .length = PERIPH_SIZE, 98 .type = MT_DEVICE 99 } 100 }; 101 102 void __init pxa_map_io(void) 103 { 104 debug_ll_io_init(); 105 iotable_init(ARRAY_AND_SIZE(common_io_desc)); 106 } 107